Patents by Inventor Nicholas Carmine DiFonzo
Nicholas Carmine DiFonzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11646603Abstract: A method for controlling a power distribution network includes receiving, via an electronic processor, a fault indication associated with a fault from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset not associated with the fault indication. The processor sends a first open command to each member of a set of downstream isolation devices for each phase in the first subset. The processor identifies a plurality of tie-in isolation devices to be closed to restore power. Responsive to identifying a first potential loop configuration, for each of the plurality of tie-in devices, the processor sends a close command to the tie-in isolation device for each of the plurality of phases and sends a second open command to the associated downstream isolation device for each phase in the second subset.Type: GrantFiled: July 20, 2020Date of Patent: May 9, 2023Assignee: G & W Electric CompanyInventors: Erich Keller, Nicholas Carmine DiFonzo
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Patent number: 11626753Abstract: Techniques for controlling a power distribution network are provided. An electronic processor receives, a fault indication associated with a fault from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The processor identifies a downstream isolation device downstream of the fault. The processor sends send a first open command to the downstream isolation device for each phase in the first subset. The processor sends a close command to a tie-in isolation device for each of the plurality of phases. The processor sends a second open command to the downstream isolation device for each phase in the second subset. Responsive to identifying a potential loop configuration, the processor sends the second open command prior to the close command.Type: GrantFiled: July 20, 2020Date of Patent: April 11, 2023Assignee: G & W Electric CompanyInventors: Erich Keller, Nicholas Carmine DiFonzo
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Patent number: 11588347Abstract: A processor receives an indication of a fault from a first isolation device. The processor sends a first open command to a downstream isolation device downstream of the fault, identifies a tie-in isolation device, and identifies a line section without current monitoring positioned between the tie-in isolation device and the downstream isolation device. The line section has a plurality of line segments, each having a load rating. The processor receives incoming and exiting current measurements for the line section and estimates a first current load for each of the line segments in the line section based on the incoming and exiting current measurements and the load ratings. The processor selects an intermediate isolation device between the tie-in isolation device and the downstream isolation device based on the first current loads, sends a second open command to the intermediate isolation device, and sends a close command to the tie-in isolation device.Type: GrantFiled: July 20, 2020Date of Patent: February 21, 2023Assignee: G & W Electric CompanyInventors: Erich Keller, Nicholas Carmine DiFonzo
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Patent number: 11251606Abstract: A method for controlling a power distribution network includes receiving, by an electronic processor, a fault indication associated with a fault in the power distribution network from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The first and second subsets each include at least one member. The processor identifies an upstream isolation device upstream of the fault. The processor identifies a downstream isolation device downstream of the fault. The processor sends an open command to the downstream isolation device for each phase in the first subset. Responsive to the first isolation device not being the upstream isolation device, the processor sends a close command to the first isolation device for each phase in the first subset.Type: GrantFiled: October 7, 2019Date of Patent: February 15, 2022Assignee: G & W ELECTRIC COMPANYInventors: Erich Keller, Nicholas Carmine DiFonzo
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Publication number: 20220021237Abstract: Techniques for controlling a power distribution network are provided. An electronic processor receives, a fault indication associated with a fault from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The processor identifies a downstream isolation device downstream of the fault. The processor sends send a first open command to the downstream isolation device for each phase in the first subset. The processor sends a close command to a tie-in isolation device for each of the plurality of phases. The processor sends a second open command to the downstream isolation device for each phase in the second subset. Responsive to identifying a potential loop configuration, the processor sends the second open command prior to the close command.Type: ApplicationFiled: July 20, 2020Publication date: January 20, 2022Inventors: Erich Keller, Nicholas Carmine DiFonzo
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Publication number: 20220021236Abstract: A processor receives an indication of a fault from a first isolation device. The processor sends a first open command to a downstream isolation device downstream of the fault, identifies a tie-in isolation device, and identifies a line section without current monitoring positioned between the tie-in isolation device and the downstream isolation device. The line section has a plurality of line segments, each having a load rating. The processor receives incoming and exiting current measurements for the line section and estimates a first current load for each of the line segments in the line section based on the incoming and exiting current measurements and the load ratings. The processor selects an intermediate isolation device between the tie-in isolation device and the downstream isolation device based on the first current loads, sends a second open command to the intermediate isolation device, and sends a close command to the tie-in isolation device.Type: ApplicationFiled: July 20, 2020Publication date: January 20, 2022Inventors: Erich Keller, Nicholas Carmine DiFonzo
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Publication number: 20220021238Abstract: A method for controlling a power distribution network includes receiving, via an electronic processor, a fault indication associated with a fault from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset not associated with the fault indication. The processor sends a first open command to each member of a set of downstream isolation devices for each phase in the first subset. The processor identifies a plurality of tie-in isolation devices to be closed to restore power. Responsive to identifying a first potential loop configuration, for each of the plurality of tie-in devices, the processor sends a close command to the tie-in isolation device for each of the plurality of phases and sends a second open command to the associated downstream isolation device for each phase in the second subset.Type: ApplicationFiled: July 20, 2020Publication date: January 20, 2022Inventors: Erich Keller, Nicholas Carmine DiFonzo
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Single phase fault isolation and restoration for loss of voltage fault in power distribution network
Patent number: 11022640Abstract: A system for controlling a power distribution network providing power using a plurality of phases comprises an electronic processor and memory storing instructions that, when executed by the electronic processor, cause the system to receive a loss of voltage fault indication associated with a fault in the power distribution network. The electronic processor identifies a first subset of the plurality of phases associated with the loss of voltage fault indication and a second subset of the plurality of phases not associated with the loss of voltage fault indication. The first and second subsets each include at least one member. The electronic processor identifies a downstream isolation device downstream of the fault. The electronic processor sends an open command to the downstream isolation device for each phase in the first subset. The electronic processor sends a close command to a tie-in isolation device downstream of the downstream isolation device.Type: GrantFiled: October 15, 2020Date of Patent: June 1, 2021Assignee: G & W ELECTRIC COMPANYInventors: Erich Keller, Nicholas Carmine DiFonzo -
Patent number: 11018499Abstract: A method for controlling a power distribution network includes receiving, by an electronic processor, a fault indication associated with a fault in the power distribution network from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The first and second subsets each include at least one member. The processor identifies an upstream isolation device upstream of the fault. The processor identifies a downstream isolation device downstream of the fault. The processor sends an open command to the downstream isolation device for each phase in the first subset. Responsive to the first isolation device not being the upstream isolation device, the processor sends a close command to the first isolation device for each phase in the first subset.Type: GrantFiled: October 15, 2020Date of Patent: May 25, 2021Assignee: G & W ELECTRIC COMPANYInventors: Erich Keller, Nicholas Carmine DiFonzo
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SINGLE PHASE FAULT ISOLATION AND RESTORATION FOR LOSS OF VOLTAGE FAULT IN POWER DISTRIBUTION NETWORK
Publication number: 20210102987Abstract: A system for controlling a power distribution network providing power using a plurality of phases comprises an electronic processor and memory storing instructions that, when executed by the electronic processor, cause the system to receive a loss of voltage fault indication associated with a fault in the power distribution network. The electronic processor identifies a first subset of the plurality of phases associated with the loss of voltage fault indication and a second subset of the plurality of phases not associated with the loss of voltage fault indication. The first and second subsets each include at least one member. The electronic processor identifies a downstream isolation device downstream of the fault. The electronic processor sends an open command to the downstream isolation device for each phase in the first subset. The electronic processor sends a close command to a tie-in isolation device downstream of the downstream isolation device.Type: ApplicationFiled: October 15, 2020Publication date: April 8, 2021Inventors: Erich Keller, Nicholas Carmine DiFonzo -
Publication number: 20210104887Abstract: A method for controlling a power distribution network includes receiving, by an electronic processor, a fault indication associated with a fault in the power distribution network from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The first and second subsets each include at least one member. The processor identifies an upstream isolation device upstream of the fault. The processor identifies a downstream isolation device downstream of the fault. The processor sends an open command to the downstream isolation device for each phase in the first subset. Responsive to the first isolation device not being the upstream isolation device, the processor sends a close command to the first isolation device for each phase in the first subset.Type: ApplicationFiled: October 7, 2019Publication date: April 8, 2021Inventors: Erich Keller, Nicholas Carmine DiFonzo
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SINGLE PHASE FAULT ISOLATION AND RESTORATION FOR LOSS OF VOLTAGE FAULT IN POWER DISTRIBUTION NETWORK
Publication number: 20210102986Abstract: A system for controlling a power distribution network providing power using a plurality of phases comprises an electronic processor and memory storing instructions that, when executed by the electronic processor, cause the system to receive a loss of voltage fault indication associated with a fault in the power distribution network. The electronic processor identifies a first subset of the plurality of phases associated with the loss of voltage fault indication and a second subset of the plurality of phases not associated with the loss of voltage fault indication. The first and second subsets each include at least one member. The electronic processor identifies a downstream isolation device downstream of the fault. The electronic processor sends an open command to the downstream isolation device for each phase in the first subset. The electronic processor sends a close command to a tie-in isolation device downstream of the downstream isolation device.Type: ApplicationFiled: October 7, 2019Publication date: April 8, 2021Inventors: Erich Keller, Nicholas Carmine DiFonzo -
Publication number: 20210104888Abstract: A method for controlling a power distribution network includes receiving, by an electronic processor, a fault indication associated with a fault in the power distribution network from a first isolation device of a plurality of isolation devices. The processor identifies a first subset of a plurality of phases associated with the fault indication and a second subset of the plurality of phases not associated with the fault indication. The first and second subsets each include at least one member. The processor identifies an upstream isolation device upstream of the fault. The processor identifies a downstream isolation device downstream of the fault. The processor sends an open command to the downstream isolation device for each phase in the first subset. Responsive to the first isolation device not being the upstream isolation device, the processor sends a close command to the first isolation device for each phase in the first subset.Type: ApplicationFiled: October 15, 2020Publication date: April 8, 2021Inventors: Erich Keller, Nicholas Carmine DiFonzo