Abstract: A push notification distribution system centralizes the management and delivery of push notifications to applications executing on electronic devices. Registration requests to register applications for push notifications may be aggregated and sent as an aggregated registration request. The delivery priority of push notifications may be managed according to specified preferences. Upon receiving a push notification intended for an electronic device, a delivery priority of the push notification may be changed if an application identifier associated with the push notification is found on a list of application identifiers with designed delivery priorities.

Abstract: A mechanism for declarative service domain federation uses a declarative approach to both the visibility aspect and the management aspect of service domain federation. Instead of manually exporting services, that is, selecting individual services from source domains to be visible in the target domain, using the present system, a federation architect uses a federation console to specify federation intent. The federation intent may include federation rule, query-based service group, and quality-of-service (QoS) policy. Based on the declared federation intent, a planning engine resolves the individual services based on the group query, generates the service visibility configuration, and creates the necessary service proxies and/or mediation objects to satisfy the goal. At runtime, a service monitor collects the performance metrics of federated services and dynamically adjusts the mediation/proxy configurations to maintain the QoS objectives specified by the federation architect.

Abstract: A mechanism for declarative service domain federation uses a declarative approach to both the visibility aspect and the management aspect of service domain federation. Instead of manually exporting services, that is, selecting individual services from source domains to be visible in the target domain, using the present system, a federation architect uses a federation console to specify federation intent. The federation intent may include federation rule, query-based service group, and quality-of-service (QoS) policy. Based on the declared federation intent, a planning engine resolves the individual services based on the group query, generates the service visibility configuration, and creates the necessary service proxies and/or mediation objects to satisfy the goal. At runtime, a service monitor collects the performance metrics of federated services and dynamically adjusts the mediation/proxy configurations to maintain the QoS objectives specified by the federation architect.

Abstract: An apparatus and a method provide a solution for a computer system. The apparatus may include a package containing or referencing a plurality of software components of the solution and containing a solution definition defining in logical terms the topology requirements of the solution. The plurality of software components may be packaged as installable units which comprise a descriptor providing requirements of a target hosting environment for the software component and the software component to be installed. The solution definition of the package may include target hosting environments of the software components of a solution being defined in terms of requirements each software component has on its own target hosting environment and requirements the solution imposes on the target hosting environments.

Abstract: A mechanism for declarative service domain federation uses a declarative approach to both the visibility aspect and the management aspect of service domain federation. Instead of manually exporting services, that is, selecting individual services from source domains to be visible in the target domain, using the present system, a federation architect uses a federation console to specify federation intent. The federation intent may include federation rule, query-based service group, and quality-of-service (QoS) policy. Based on the declared federation intent, a planning engine resolves the individual services based on the group query, generates the service visibility configuration, and creates the necessary service proxies and/or mediation objects to satisfy the goal. At runtime, a service monitor collects the performance metrics of federated services and dynamically adjusts the mediation/proxy configurations to maintain the QoS objectives specified by the federation architect.

Abstract: A composite manager may include a set of managers virtualized as a single entity. The composite manager may also include at least one of a module to provide a single manager interface for the set of managers to manage at least one entity, and a module to provide a single manageability interface for the set of managers relative to any managing entity of the composite manager.

Abstract: A mechanism for declarative service domain federation uses a declarative approach to both the visibility aspect and the management aspect of service domain federation. Instead of manually exporting services, that is, selecting individual services from source domains to be visible in the target domain, using the present system, a federation architect uses a federation console to specify federation intent. The federation intent may include federation rule, query-based service group, and quality-of-service (QoS) policy. Based on the declared federation intent, a planning engine resolves the individual services based on the group query, generates the service visibility configuration, and creates the necessary service proxies and/or mediation objects to satisfy the goal. At runtime, a service monitor collects the performance metrics of federated services and dynamically adjusts the mediation/proxy configurations to maintain the QoS objectives specified by the federation architect.

Abstract: Stored data for two different images superimposed on one another can be accessed simply and efficiently from the same VRAM. The SAM of the VRAM is divided into multiple-independent portions, each of which respond to its own independently controlled address counter. By loading the image data access into respective SAM portions, and switching data access between SAM portions at the SAM address rate, superimposed data of two different images can be displayed from the same VRAM.

Abstract: In a logic circuit having clocked state latches and combinatorial logic for functional processing of a task in response to functional clocking of the state latches, the state latches are additionally interconnected to form a scannable chain of latches, and task switching logic is provided for suspending task processing by interrupting the functional clocking of the state latches and, during such suspension, scanning the state latches such that existing contents of the state latches defining a task state can be saved from the state latches or new contents defining a task state can be loaded into the state latches. The invention provides an efficient means for switching tasks being performed by a logic circuit in a multiprocessing enviornment.

Abstract: A logic circuit is presented comprising a plurality of registers 30, 39; each register 30 having first register latches 31, 41 for clocking data into the register 30 in response to a first clock signal 37 and second register latches for clocking data out of the register in response to a second clock signal 38, and combinatorial logic comprising address logic 4 for addressing data to a register and first suppression logic 33 for inhibiting the first clock signal input to the register in response to the address logic, wherein the logic circuit further comprises second suppression logic 34, 35 for inhibiting the second clock signal input to the register in collective response to the address logic and the first clock signal.

Abstract: A computer graphics system includes display logic (92) comprising a destination bit map (11) containing a plurality of image bits which map to a plurality of pixels for presenting an image, an auxiliary bit map (1) containing a plurality of area boundary bits representing pixels defining an area boundary line which encloses an area of the image, area filling logic (7) for operating upon those image bits enclosed by the area boundary line in order to fill the area with a particular pattern and color, characterized in that the display logic further comprises area boundary drawing logic (5) having line segmentation means to resolve the specified boundary line into a plurality of intersecting two pixel line segments which can, from that time forward, be operated upon separately to define the area boundary bits in accordance with conventional area boundary drawing rules.

Abstract: It is known to obtain from a sinterable powder (e.g., of silicon nitride+metallic oxide sintering aid) a shaped article with at least 95% theoretical density, by the hot isostatic pressing of a preshaped body of the powder while that body is encapsulated in a gas-impermeable capsule which is plastic at the temperature of the hot gas by which the isostatic pressure is applied. Until now, a pressure of the order of 100 MPa has been treated as the practical minimum necessary for hot isostatic pressing. By the invention, a pressure less than 20 MPa is used, in conjunction with a degassing of the preshaped body, carried out prior to encapsulation, as in a vacuum whose pressure is no more than a few mm of mercury, and preferably less than 1 mm (approximately equal to 0.15 kPa).

Abstract: A digital arithmetic logic unit in which the carry chain is subdivided into a series of bit fields allowing independent and simultaneous data manipulation to be undertaken in each of the bit fields. Division of the carry chain is achieved via a carry chain selector consisting of a series of multiplexers, one being placed between each pair of adjacent stages of the carry chain. Each multiplexer has two data inputs, one of which forms the carry to the next stage of the carry chain. The carry selected either continues the computation or defines the end of one bit field and provides the least significant carry-in bit to the next bit field. This selection of the carry by the multiplexer is under control of a programmable register, thus allowing variable division of the carry chain.

Abstract: In a line generator and a method for determining the individual pixels to be plotted for a line to be drawn in a display system, coded representations of a plurality of lines are stored in a line definition table. The coded representation of each individual line is a string of data items representing the transitions between adjacent pixels to be plotted for drawing the individual line. Preferably, only coded representations of lines up to a predetermined size (i.e. the length of the line in the case of a straight line) are stored in the line definition table. Strings of data items for representing the pixels to be plotted for longer lines to be drawn are still calculated as in the prior art. In this case, control logic determines whether there are coded representations of a line to be drawn in the line definition table, or not, and passes control to appropriate processing logic for determining the pixels to be plotted.

Abstract: Apparatus for serializing 2.sup.M parallel outputs of an all points addressable memory into successive data groups, with each data group corresponding to a respective value for a pixel in an image, wherein the bit-length of the pixel value is selectable. The apparatus includes a gate circuit having 2.sup.M parallel input junctions connected to the outputs of the memory and 2.sup.N output junctions. The gate circuit selectively converts each set of 2.sup.M parallel inputs at the input junctions in to 2.sup.M-n successive data groups, with each group having a bit-length of 2.sup.n bits. Each such group is transmitted to 2.sup.n of the 2.sup.N output junctions. A communication element conveys to the gate circuit a signal which controls the bit-length 2.sup.n of the data groups, wherein n is an integer 1.ltoreq.n.ltoreq.N.ltoreq.M.