Patents by Inventor Nicholas G. Eror

Nicholas G. Eror has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Shielded high-Tc bscco tapes or wires for high field applications
    Patent number: 6466805
    Abstract: A composite superconductor having an interior component of multiple filaments of superconducting Bi-2223 sheathed in a Ag or Ag alloy material, and a RE, TI or Hg based superconductor surrounding the interior component.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: October 15, 2002
    Assignee: The University of Chicago
    Inventors: Uthamalingam Balachandran, Milan Lelovic, Nicholas G. Eror
  • Shielded high-T bscco tapes or wires for high field applications
    Publication number: 20020004463
    Abstract: A composite superconductor having an interior component of multiple filaments of superconducting Bi-2223 sheathed in a Ag or Ag alloy material, and a RE, TI or Hg based superconductor surrounding the interior component.
    Type: Application
    Filed: April 26, 2001
    Publication date: January 10, 2002
    Applicant: The University of Chicago
    Inventors: Uthamalingam Balachandran, Milan Lelovic, Nicholas G. Eror
  • Shielded high-TC BSCCO tapes or wires for high field applications
    Patent number: 6253096
    Abstract: A composite superconductor having an interior component of multiple filaments of superconducting Bi-2223 sheathed in a Ag or Ag alloy material, and a RE, TI or Hg based superconductor surrounding the interior component.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: June 26, 2001
    Assignee: The University of Chicago
    Inventors: Uthamalingam Balachandran, Milan Lelovic, Nicholas G. Eror
  • Elongate Bi-based superconductors made by freeze dried conducting powders
    Patent number: 5874384
    Abstract: A superconducting tape or wire with a longitudinally extending outer layer of Ag or its alloys defining an inner region, an area of Ag or its alloys in said inner region extending longitudinally of said tape or wire separated from said outer layer of metal by freeze dried superconducting material. The inner Ag area may be a rod, a tube or a number of wires. The superconductor material is preferably B-2223.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: February 23, 1999
    Assignee: The University of Chicago
    Inventors: Uthamalingam Balachandran, Milan Lelovic, Nicholas G. Eror
  • Method of making depthwise-oriented integrated circuit capacitors
    Patent number: 4427457
    Abstract: A depthwise-oriented capacitor comprises a cluster of separate, parallel, narrow elongated oppositely-doped conductive regions extending depthwise into a semiconductor substrate, for example, in an integrated circuit. The conductive regions can be parallel plates, but are preferably column shaped. The conductive regions are formed by ion implanting or diffusing a dopant into the substrate in a direction aligned with a crystallographic channel thereof to facilitate maximum ion penetration. P-type regions form one pole of the capacitor and N-type regions interspersed among the p-type regions form the opposite pole. Doping concentrations within the regions are sufficient to establish metal-like electric field boundary conditions. The bulk of the substrate containing the conductive regions is either near-intrinsic or semi-insulative so that the semiconductor material between the conductive regions is substantially nonconductive.
    Type: Grant
    Filed: April 7, 1981
    Date of Patent: January 24, 1984
    Assignee: Oregon Graduate Center
    Inventors: F. Paul Carlson, John S. Blakemore, Nicholas G. Eror