Patents by Inventor Nicholas H. Tripisas

Nicholas H. Tripisas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Monos device having buried metal silicide bit line
    Patent number: 6828199
    Abstract: A MONOS device and method for making the device has a charge trapping dielectric layer, such as an oxide-nitride-oxide (ONO) layer, formed on a substrate. A recess is created through the ONO layer and in the substrate. A metal silicide bit line is formed in the recess and bit line oxide is formed on top of the metal silicide. A word line is formed over the ONO layer and the bit line oxide, and a low resistance silicide is provided on top of the word line. The silicide is formed by laser thermal annealing, for example.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: December 7, 2004
    Assignees: Advanced Micro Devices, Ltd., Fujitsu Limited
    Inventors: Jusuke Ogura, Mark T. Ramsbey, Arvind Halliyal, Zoran Krivokapic, Minh Van Ngo, Nicholas H. Tripisas