Patents by Inventor Nicholas I. Archibald

Nicholas I. Archibald has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876456
    Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 16, 2024
    Assignee: Alpha and Omega Semiconductor International LP
    Inventors: Nicholas I. Archibald, Steven P. Laur, Rhys S. A. Philbrick
  • Publication number: 20230283186
    Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.
    Type: Application
    Filed: May 13, 2023
    Publication date: September 7, 2023
    Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
  • Patent number: 11711071
    Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: July 25, 2023
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Patent number: 11682974
    Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: June 20, 2023
    Assignee: Alpha and Omega Semiconductor International LP
    Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
  • Publication number: 20230179099
    Abstract: A controller for a switching regulator receiving an input voltage and generating a regulated output voltage includes a buck control circuit and a boost control circuit. The controller activates the buck control circuit to generate the regulated output voltage having a first voltage value less than the input voltage. The controller activates the boost control circuit to return charges stored on the output capacitor at the output node to the input node, thereby driving the regulated output voltage to a second voltage value lower than the first voltage value. In some embodiments, in response to a command instructing the controller to allow the output voltage to decay, the controller operates in the boost mode using the boost control circuit to recycle the stored charge at the output node while ramping down the output voltage.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 8, 2023
    Inventors: Nicholas I. Archibald, Steven P. Laur, Rhys S. A. Philbrick
  • Publication number: 20230091808
    Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 23, 2023
    Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
  • Patent number: 11522451
    Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: December 6, 2022
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Publication number: 20220052675
    Abstract: A current mode control modulation includes a ramp signal generator generating a slope compensated ramp signal with slope compensation. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator includes a switched capacitor circuit supplied by a current circuit to charge or discharge nodes in the switched capacitor circuit to generate the ramp signal with slope compensation.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Patent number: 11196409
    Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: December 7, 2021
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Publication number: 20210184572
    Abstract: An apparatus, comprising, a MOSFET, a controller coupled to the MOSFET, an inductor conductively coupled to the MOSFET. A reported current output of the controller is adjusted based on a predetermined excursion of an attribute of the inductor from a fixed attribute value.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 17, 2021
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Publication number: 20210175879
    Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.
    Type: Application
    Filed: September 28, 2020
    Publication date: June 10, 2021
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur
  • Patent number: 10833661
    Abstract: A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate the ramp signal with optimal slope compensation built into the ramp signal.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: November 10, 2020
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Nicholas I. Archibald, Rhys S. A. Philbrick, Steven P. Laur