Patents by Inventor Nicholas M. Atkinson

Nicholas M. Atkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10355477
    Abstract: Circuitry and methods are provided that may be implemented to transfer digital signals between multiple voltage domains while some of these domains may be invalid, e.g., such as to transfer a digital signal from a source voltage domain to a destination voltage domain while the voltage of the source domain is zero or invalid. Possible implementations include, but are not limited to, for power selection and distribution in an integrated circuit chip that has multiple power sources (e.g., such as main power supply and a backup power supply), and in which at startup the chip is agnostic of (or is not aware of) which power supply or power supplies is actually powered and available.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 16, 2019
    Assignee: Silicon Laboratories Inc.
    Inventors: Mohamed Elsayed, Matthew Powell, Nicholas M. Atkinson, Praveen Kallam
  • Publication number: 20190123734
    Abstract: An apparatus includes an integrated circuit (IC), which includes complementary metal oxide semiconductor (CMOS) circuitry that includes a pull-up network coupled to a supply voltage and at least one input signal. The IC further includes a first metal oxide semiconductor (MOS) transistor coupled to the pull-up network and to a first bias voltage to reduce a gate-induced drain leakage (GIDL) current of the CMOS circuitry.
    Type: Application
    Filed: December 16, 2018
    Publication date: April 25, 2019
    Inventors: Arnab Kumar Dutta, Essam Atalla, Nicholas M. Atkinson
  • Patent number: 10158354
    Abstract: An apparatus includes an integrated circuit (IC), which includes complementary metal oxide semiconductor (CMOS) circuitry that includes a pull-up network coupled to a supply voltage and at least one input signal. The IC further includes a first metal oxide semiconductor (MOS) transistor coupled to the pull-up network and to a first bias voltage to reduce a gate-induced drain leakage (GIDL) current of the CMOS circuitry.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: December 18, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Arnab Kumar Dutta, Essam Atalla, Nicholas M. Atkinson
  • Publication number: 20180234089
    Abstract: An apparatus includes an integrated circuit (IC), which includes complementary metal oxide semiconductor (CMOS) circuitry that includes a pull-up network coupled to a supply voltage and at least one input signal. The IC further includes a first metal oxide semiconductor (MOS) transistor coupled to the pull-up network and to a first bias voltage to reduce a gate-induced drain leakage (GIDL) current of the CMOS circuitry.
    Type: Application
    Filed: February 10, 2017
    Publication date: August 16, 2018
    Inventors: Arnab Kumar Dutta, Essam Atalla, Nicholas M. Atkinson
  • Patent number: 9964986
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 8, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy T. Rueger, Praveen Kallam, Nicholas M. Atkinson
  • Patent number: 9836071
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a power controller, which includes a regulator and a controller. The regulator receives a plurality of input voltages and provides a regulated output voltage. The controller controls the regulator to generate the regulated output voltage from the plurality of input voltages. The power controller provides power to a load integrated in the IC from a set of arbitrary input voltages. The set of arbitrary input voltages includes the plurality of input voltages.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: December 5, 2017
    Assignee: Silicon Laboratories Inc.
    Inventors: Nicholas M. Atkinson, Praveen Kallam, Timothy T. Rueger
  • Publication number: 20170185094
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a power controller, which includes a regulator and a controller. The regulator receives a plurality of input voltages and provides a regulated output voltage. The controller controls the regulator to generate the regulated output voltage from the plurality of input voltages. The power controller provides power to a load integrated in the IC from a set of arbitrary input voltages. The set of arbitrary input voltages includes the plurality of input voltages.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Nicholas M. Atkinson, Praveen Kallam, Timothy T. Rueger
  • Publication number: 20170185096
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Timothy T. Rueger, Praveen Kallam, Nicholas M. Atkinson
  • Publication number: 20170126005
    Abstract: Circuitry and methods are provided that may be implemented to transfer digital signals between multiple voltage domains while some of these domains may be invalid, e.g., such as to transfer a digital signal from a source voltage domain to a destination voltage domain while the voltage of the source domain is zero or invalid. Possible implementations include, but are not limited to, for power selection and distribution in an integrated circuit chip that has multiple power sources (e.g., such as main power supply and a backup power supply), and in which at startup the chip is agnostic of (or is not aware of) which power supply or power supplies is actually powered and available.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Mohamed Elsayed, Matthew Powell, Nicholas M. Atkinson, Praveen Kallam
  • Patent number: 9438165
    Abstract: A method includes using a current source to provide a charging current to a capacitor of a resistor-capacitor (RC) tank of an RC oscillator. The method includes using a resistor of the current source as a resistor for the RC tank.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: September 6, 2016
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew R. Powell, Axel Thomsen, Nicholas M. Atkinson
  • Publication number: 20160105148
    Abstract: A method includes using a current source to provide a charging current to a capacitor of a resistor-capacitor (RC) tank of an RC oscillator. The method includes using a resistor of the current source as a resistor for the RC tank.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 14, 2016
    Inventors: Matthew R. Powell, Axel Thomsen, Nicholas M. Atkinson