Patents by Inventor Nicholas Mikulas Labun

Nicholas Mikulas Labun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5757960
    Abstract: A handwriting recognition system achieves a higher recognition rate by using a feature extraction method which computes features based on multiple data frames. A plurality of data frames is generated from handwritten text received by the system. Each data frame includes samples taken from the handwritten text. Individual-frame features are extracted from individual data frames, and in turn, multi-frame features are extracted from individual-frame features which correspond to different data frames.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: May 26, 1998
    Inventors: Michael Chase Murdock, Shay-Ping Thomas Wang, Nicholas Mikulas Labun
  • Patent number: 5710712
    Abstract: A processor system provides electrical power and processing to a plurality of appliances. A data bus receives a control input signal from each of the plurality of appliances and transfers electrical power and output command signals to each of the plurality of appliances. A processor, coupled to the data bus, generates an output command signal for each of the plurality of appliances in response to the input control signals.
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: January 20, 1998
    Assignee: Motorola, Inc.
    Inventor: Nicholas Mikulas Labun
  • Patent number: 5696986
    Abstract: A computer processor for performing mathematical operations includes a logarithm converter which generates log values on a data bus, a plurality of processing elements connected to the data bus, an inverse-logarithm converter which receives values from the processing elements, an accumulator which sums converted values from the inverse-logarithm converter, and a control unit for configuring the accumulator to perform various summing operations. The computer processor also includes a switch for providing processor outputs as feedback. An instruction, selected from a set of instructions, is decoded by the control unit to configure the computer processor to perform operations on a data stream.
    Type: Grant
    Filed: August 9, 1995
    Date of Patent: December 9, 1997
    Assignee: Motorola, Inc.
    Inventors: ShaoWei Pan, Scott Edward Lloyd, Shay-Ping Thomas Wang, Nicholas Mikulas Labun
  • Patent number: 5685008
    Abstract: A computer processor for performing mathematical operations includes a logarithm converter which generates log values on a data bus, a plurality of processing elements connected to the data bus, an inverse-logarithm converter which receives values from the processing elements, an accumulator which sums converted values from the inverse-logarithm converter, and a control unit for configuring the accumulator to perform various summing operations. The computer processor also includes a switch for providing processor outputs as feedback. An instruction, selected from a set of instructions, is decoded by the control unit to configure the computer processor to perform operations on a data stream.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: November 4, 1997
    Assignee: Motorola, Inc.
    Inventors: Shao Wei Pan, Shay-Ping Thomas Wang, Scott Edward Lloyd, Nicholas Mikulas Labun, David Alan Hayner