Patents by Inventor Nicholas Necula

Nicholas Necula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5870441
    Abstract: A clocking mechanism with improved fault tolerance for synchronizing a distributed processing system includes a plurality of distributed clock sources. Each clock source may operate as a master clock for synchronizing the operations of the entire system or as a slave to an external clock while remaining available, in a backup capacity, to operate as a master clock in the event of a failure in the previous master clock. A clock selection mechanism is provided in each distributed switch element for selecting the best clock available to each switch element for synchronization. A failure recovery mechanism is provided with fast and automatic recovery in the event of a failure in a master clock. A data extraction mechanism is also provided capable of sampling a bit stream that is not phase-aligned, even in the presence of timing jitter and pulse width distortion, and having provisions for detecting a bit slip.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: February 9, 1999
    Assignee: IPC Information Systems, Inc.
    Inventors: John M. Cotton, Nicholas Necula, Bidyut Parruck, Fryderyk Tyra, Alex T. Wissink, Enrique Abreu
  • Patent number: 5577075
    Abstract: A clocking mechanism with improved fault tolerance for synchronizing a distributed processing system includes a plurality of distributed clock sources. Each clock source may operate as a master clock for synchronizing the operations of the entire system or as a slave to an external clock while remaining available, in a backup capacity, to operate as a master clock in the event of a failure in the previous master clock. A clock selection mechanism is provided in each distributed switch element for selecting the best clock available to each switch element for synchronization. A failure recovery mechanism is provided with fast and automatic recovery in the event of a failure in a master clock. A data extraction mechanism is also provided capable of sampling a bit stream that is not phase-aligned, even in the presence of timing jitter and pulse width distortion, and having provisions for detecting a bit slip.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: November 19, 1996
    Assignee: IPC Information Systems, Inc.
    Inventors: John M. Cotton, Nicholas Necula, Bidyut Parruck, Fryderyk Tyra, Alex T. Wissink, Enrique Abreu
  • Patent number: 5379280
    Abstract: A conferencing device and method among terminals in a distributed digital telephone switching system is provided. The telephone switching system has a plurality of switching elements for interconnecting telephone units and telephone lines via communication links. A duplex path is set between each party in the conference and a designated bridge port. The speech from all the parties in the conference is summed and at the bridge port the sum is sent back to all engaged in the conference. As each party receives the sum, it subtracts its own speech data and therefore obtains the speech data from the other parties in the conference.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: January 3, 1995
    Assignee: IPC Information Systems, Inc.
    Inventors: John M. Cotton, Neil C. Olsen, Alex T. Wissink, Gary V. Pieper, William A. Oswald, Nicholas Necula, Enrique Abreu, Maurice J. Mascarenhas, Rudy De Bruyn
  • Patent number: 5255264
    Abstract: A communication switching system with distributed control processing is provided. The system includes a digital switching network having a modular array of intelligent digital switching elements each having processors and memory to set up communication paths for voice and data between the terminal module processors such as line cards and telephone units. Each addressable location in the system is assigned a logical address code (LAC). When a route is requested, a switch element processor interprets the destination LAC and selects a route through the switch toward the destination with each switch element in the communication path setting a route toward that destination. The switching network provides duplex paths for flexible communication. With such a duplex path speech is directed from a first terminal unit such as a telephone station and a second terminal unit such as a line card into a bridge port which sums the speech data from the two sources.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: October 19, 1993
    Assignee: IPC Information Systems, Inc.
    Inventors: John M. Cotton, Neil C. Olsen, Alex T. Wissink, Gary V. Pieper, William A. Oswald, Nicholas Necula, Enrique Abreu, Maurice J. Mascarenhas, Rudy De Bruyn
  • Patent number: 5237571
    Abstract: The broadcast system of the switching network provides for the broadcast or multicast of interface switch status broadcasts and interface switch event broadcasts. An interface switch feature processor initiates a broadcast message made up of two bytes of data on a first channel, with particular command codes to identify the type of data contained within the broadcast message, paired with another two bytes of data in the same frame on a second channel. Broadcast messages are sent into the switching network in a non-broadcast manner until they reach the fold point of the switch network. From the fold point the broadcast messages are broadcast on every available broadcast channel directed out of the switch network towards the interface switches.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: August 17, 1993
    Assignee: IPC Information Systems, Inc.
    Inventors: John M. Cotton, Neil C. Olsen, Nicholas Necula, William A. Oswald