Patents by Inventor Nicholas P. Holt

Nicholas P. Holt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5530816
    Abstract: A data processing system has a scheduling unit for scheduling instructions from a number of instruction streams, and assigning those instructions to a number of execution units. A termination unit receives the results of the execution and informs the scheduling unit of which operands are available. The scheduling unit uses the operand availability information to control the scheduling of the instructions.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: June 25, 1996
    Assignee: International Computers Limited
    Inventor: Nicholas P. Holt
  • Patent number: 5394551
    Abstract: In a data processing system a number of processing nodes share resources. Access to the shared resources is controlled by semaphores, each node having a local copy of all the semaphores. Nodes may acquire ownership of semaphores. When a node requires a semaphore operation on a particular semaphore, a semaphore message is broadcast to all the nodes instructing them to perform the semaphore operation on their local copies of the semaphore. If the semaphore is unowned, the node must suspend the semaphore operation until the message returns, so as to ensure correct chronology for the semaphore operation. If, however, the semaphore owned by this node, the node can perform the semaphore operation without waiting for the message to return. This speeds up the semaphore mechanism. If the semaphore is owned by another node, that other node relinquishes ownership so that the semaphore operation can be performed.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: February 28, 1995
    Assignee: International Computers Limited
    Inventors: Nicholas P. Holt, Michael Fields, Mark N. Fullerton, Andrew J. Knowles
  • Patent number: 4763246
    Abstract: A microprogram controlled data processing apparatus is described, in which each machine-level instruction is divided into a number of phases, and each phase is executed by a sequence of microinstructions. The machine-level instruction is decoded to produce a set of microprogram parameters, and in each phase of the instruction a sub-set of these parameters is selected, and broadcast over a parameter bus to individual decoders which decode the microinstructions, so as to qualify the effects of the microinstructions. The use of parameters in this way allows the same microprogram sequence to be used for several different instruction variants, and hence reduces the total size of the microprogram.
    Type: Grant
    Filed: August 13, 1985
    Date of Patent: August 9, 1988
    Assignee: International Computers Limited
    Inventors: Nicholas P. Holt, Brian J. Procter
  • Patent number: 4751684
    Abstract: Search apparatus is described for locating an item which satisfies a predetermined criterion e.g. an instruction ready for execution or a free block of data. The apparatus uses a tree structure where each terminal node represents one of the items and is set if that item satisfies the criterion. A non-terminal node is set if any of its subordinate nodes is set. In order to locate an item, a path is traced through the tree, starting at the root node and passing through a series of set nodes until a set terminal node is reached.
    Type: Grant
    Filed: May 19, 1986
    Date of Patent: June 14, 1988
    Assignee: International Computers Limited
    Inventor: Nicholas P. Holt
  • Patent number: 4714990
    Abstract: Clearance arrangement for data storage apparatus. Data items D are entered into a store 10 together with a tag T equal to the current value of a counter 11. Data items are valid only while the counter 11 retains its current value. When it is desired to clear the store 10 the counter is incremented so that items with the previous tag value are rendered invalid. On some or all of such occasions a fraction of the store locations are also cleared by setting their tags to a null value. By the time the counter has completed a cycle all locations have been cleared in this way and cannot erroneously appear to contain valid data remaining from the previous cycle. The store is out of action to allow it to be cleared only for a relatively short time. Different tag counters may be used for different data types.
    Type: Grant
    Filed: August 22, 1983
    Date of Patent: December 22, 1987
    Assignee: International Computers Limited
    Inventors: Peter L. L. Desyllas, Nicholas P. Holt
  • Patent number: 4697268
    Abstract: Data processing apparatus includes a number of units connected by a bus over which each unit can send public write messages to all the other units in parallel. The units are connected in a loop by means of public write acceptance lines. Whenever a unit receives a public write message it sends an acceptance signal to the next unit in the loop. Each unit produces an error signal if it receives a public write message but does ot receive any corresponding acceptance signal, or if it receives an acceptance signal without having received a corresponding public write message. Thus, each unit checks its neighbors in the loop to ensure correct reception of the messages.
    Type: Grant
    Filed: August 29, 1985
    Date of Patent: September 29, 1987
    Assignee: International Computers Limited
    Inventors: Peter L. L. Desyllas, Nicholas P. Holt, Finbar Naven