Abstract: A method, apparatus and system testing a plurality of semiconductor chips in a distributed memory buffer system is provided. Embodiments of the present invention recognize improvements to testing signals through the chip substrate and motherboard. This invention overloads the shared broadcast bus by using it for test purposes rather than its normal mainline function. One of the main components of this invention is the A/C chip. In test mode, the AC chip converts JTAG commands into an internal test format and sends test data over the shared broadcast bus. Each data chip determines whether the scan data is for itself or if it should ignore it. The corresponding data chip then processes the data, and if necessary sends return data back to the address and command chip, where it is converted back into JTAG format and can be seen by the tester.

Abstract: A method, apparatus and system testing a plurality of semiconductor chips in a distributed memory buffer system is provided. Embodiments of the present invention recognize improvements to testing signals through the chip substrate and motherboard. This invention overloads the shared broadcast bus by using it for test purposes rather than its normal mainline function. One of the main components of this invention is the A/C chip. In test mode, the AC chip converts JTAG commands into an internal test format and sends test data over the shared broadcast bus. Each data chip determines whether the scan data is for itself or if it should ignore it. The corresponding data chip then processes the data, and if necessary sends return data back to the address and command chip, where it is converted back into JTAG format and can be seen by the tester.