Patents by Inventor Nickolas J. Mazzeo

Nickolas J. Mazzeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5338702
    Abstract: The present invention provides a method for fabricating tungsten local interconnections in high density CMOS circuits, and also provides high density CMOS circuits having local interconnections formed of tungsten. Pursuant to the method, an etch stop layer of chromium is initially deposited on the circuit elements of the CMOS silicon substrate. Next, a conductive layer of tungsten is non-selectively deposited on the chromium layer. A photoresist mask is then lithographically patterned over the tungsten layer. The tungsten layer is then etched down to, and stopping at, the chromium layer, after which the photoresist mask is stripped. The stripping preferably uses a low temperature plasma etch in O.sub.2 at a temperature of less than 100.degree. C. Finally, a directional O.sub.2 reactive ion etch is used to remove the chromium layer selectively to the silicon substrate. Borderless contacts are formed with the aid of the chromium etch stop layer beneath the tungsten local interconnection layer.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: August 16, 1994
    Assignee: International Business Machines Corporation
    Inventors: Edward Kobeda, Jeffrey P. Gambino, George G. Gifford, Nickolas J. Mazzeo