Patents by Inventor Nicola Benvenuti
Nicola Benvenuti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230336246Abstract: A host module configured for insertion into a chassis of a network element includes a Printed Circuit Board (PCB); a plurality of rails disposed on the PCB, for housing one or more universal sub slot modules on the host module, wherein the plurality of rails are for guiding a universal sub slot module during insertion and for stabilization thereof; and a faceplate disposed to the PCB and including one or more openings each for the one or more universal sub slot modules, wherein the PCB communicates to each of the one or more universal sub slot modules via a plurality of high-speed links that are at least 28 Gbps each. At least one of the one or more universal sub slot modules can be a coherent modem or a router.Type: ApplicationFiled: June 23, 2023Publication date: October 19, 2023Inventors: Marc Leclair, Mitchell O’Leary, Nicola Benvenuti, James McGale, Daniel Rivaud, Sheldon Button
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Patent number: 11736195Abstract: A universal sub slot module includes a Printed Circuit Board (PCB) including circuitry for power, a data plane, and a control plane; a faceplate connected to one end of the PCB and connectors connected to another end of the PCB, wherein the connectors are configured to connect to corresponding connectors in a host module; and a form factor containing the PCB and configured to interface a sub slot in the host module configured to operate in a chassis-based or rack mounted unit network element. The host module can include a plurality of sub slots, each being a port having one of the universal sub slot module and a filler module. The data plane can be configured to implement one of Optical Transport Network (OTN), Beyond 100G, Flexible Optical (FlexO), Ethernet, and Flexible Ethernet (FlexE).Type: GrantFiled: July 30, 2021Date of Patent: August 22, 2023Inventors: Marc Leclair, Mitchell O'Leary, Nicola Benvenuti, James McGale, Daniel Rivaud, Sheldon Button
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Patent number: 11703649Abstract: A modular hardware platform utilizes a combination of different types of units that are pluggable into cassette endpoints. The present disclosure enables the construction of an extremely large system, e.g., 500 Tb/s+, as well as small, standalone systems using the same hardware units. This provides flexibility to build different systems with different slot pitches. The hardware platform includes various numbers of stackable units that mate with a cost-effective, hybrid Printed Circuit Board (PCB)/Twinax backplane, that is orthogonally oriented relative to the stackable units. In an embodiment, the hardware platform supports a range of 14.4 Tb/s-800 Tb/s+ in one or more 19? racks, providing full features Layer 3 to Layer 0 support, i.e., protocol support for both a transit core router and full feature edge router including Layer 2/Layer 3 Virtual Private Networks (VPNs), Dense Wave Division Multiplexed (DWDM) optics, and the like.Type: GrantFiled: June 14, 2022Date of Patent: July 18, 2023Assignee: Ciena CorporationInventors: Daniel Rivaud, Anthony Mayenburg, Fabien Colton, Nicola Benvenuti
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Publication number: 20220308299Abstract: A modular hardware platform utilizes a combination of different types of units that are pluggable into cassette endpoints. The present disclosure enables the construction of an extremely large system, e.g., 500 Tb/s+, as well as small, standalone systems using the same hardware units. This provides flexibility to build different systems with different slot pitches. The hardware platform includes various numbers of stackable units that mate with a cost-effective, hybrid Printed Circuit Board (PCB)/Twinax backplane, that is orthogonally oriented relative to the stackable units. In an embodiment, the hardware platform supports a range of 14.4 Tb/s-800 Tb/s+ in one or more 19? racks, providing full features Layer 3 to Layer 0 support, i.e., protocol support for both a transit core router and full feature edge router including Layer 2/Layer 3 Virtual Private Networks (VPNs), Dense Wave Division Multiplexed (DWDM) optics, and the like.Type: ApplicationFiled: June 14, 2022Publication date: September 29, 2022Inventors: Daniel Rivaud, Anthony Mayenburg, Fabien Colton, Nicola Benvenuti
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Patent number: 11372180Abstract: A modular networking hardware platform utilizes a combination of different types of units that are pluggable into cassette endpoints. The present disclosure enables the construction of an extremely large system, e.g., 500 Tb/s+, as well as small, standalone systems using the same hardware units. This provides flexibility to build different systems with different slot pitches. The hardware platform includes various numbers of stackable units that mate with a cost-effective, hybrid Printed Circuit Board (PCB)/Twinax backplane, that is orthogonally oriented relative to the stackable units. In an embodiment, the hardware platform supports a range of 14.4 Tb/s-800 Tb/s+ in one or more 19? racks, providing full features Layer 3 to Layer 0 support, i.e., protocol support for both a transit core router and full feature edge router including Layer 2/Layer 3 Virtual Private Networks (VPNs), Dense Wave Division Multiplexed (DWDM) optics, and the like.Type: GrantFiled: January 31, 2020Date of Patent: June 28, 2022Assignee: Ciena CorporationInventors: Daniel Rivaud, Anthony Mayenburg, Fabien Colton, Nicola Benvenuti
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Publication number: 20210367674Abstract: A universal sub slot module includes a Printed Circuit Board (PCB) including circuitry for power, a data plane, and a control plane; a faceplate connected to one end of the PCB and connectors connected to another end of the PCB, wherein the connectors are configured to connect to corresponding connectors in a host module; and a form factor containing the PCB and configured to interface a sub slot in the host module configured to operate in a chassis-based or rack mounted unit network element. The host module can include a plurality of sub slots, each being a port having one of the universal sub slot module and a filler module. The data plane can be configured to implement one of Optical Transport Network (OTN), Beyond 100G, Flexible Optical (FlexO), Ethernet, and Flexible Ethernet (FlexE).Type: ApplicationFiled: July 30, 2021Publication date: November 25, 2021Inventors: Marc Leclair, Mitchell O'Leary, Nicola Benvenuti, James McGale, Daniel Rivaud, Sheldon Button
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Publication number: 20210239927Abstract: A modular networking hardware platform utilizes a combination of different types of units that are pluggable into cassette endpoints. The present disclosure enables the construction of an extremely large system, e.g., 500 Tb/s+, as well as small, standalone systems using the same hardware units. This provides flexibility to build different systems with different slot pitches. The hardware platform includes various numbers of stackable units that mate with a cost-effective, hybrid Printed Circuit Board (PCB)/Twinax backplane, that is orthogonally oriented relative to the stackable units. In an embodiment, the hardware platform supports a range of 14.4 Tb/s-800 Tb/s+ in one or more 19? racks, providing full features Layer 3 to Layer 0 support, i.e., protocol support for both a transit core router and full feature edge router including Layer 2/Layer 3 Virtual Private Networks (VPNs), Dense Wave Division Multiplexed (DWDM) optics, and the like.Type: ApplicationFiled: January 31, 2020Publication date: August 5, 2021Inventors: Daniel Rivaud, Anthony Mayenburg, Fabien Colton, Nicola Benvenuti
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Patent number: 11079559Abstract: A universal sub slot module is configured to be inserted in a slot in a hardware module that is configured to be inserted in one of a chassis and rack mounted unit. The universal sub slot module includes a printed circuit board; an optics component on the printed circuit board; a data plane and a control plane on the printed circuit board and communicatively coupled to the optics components; and connectors on the printed circuit board and communicatively coupled to the data plane and the control plane, wherein the connectors are configured to connect to corresponding connectors in the one or more hardware modules.Type: GrantFiled: April 23, 2019Date of Patent: August 3, 2021Assignee: Ciena CorporationInventors: Marc Leclair, Mitchell O'Leary, Nicola Benvenuti, James McGale, Daniel Rivaud, Sheldon Button
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Publication number: 20200341218Abstract: A universal sub slot module is configured to be inserted in a slot in a hardware module that is configured to be inserted in one of a chassis and rack mounted unit. The universal sub slot module includes a printed circuit board; an optics component on the printed circuit board; a data plane and a control plane on the printed circuit board and communicatively coupled to the optics components; and connectors on the printed circuit board and communicatively coupled to the data plane and the control plane, wherein the connectors are configured to connect to corresponding connectors in the one or more hardware modules.Type: ApplicationFiled: April 23, 2019Publication date: October 29, 2020Inventors: Marc Leclair, Mitchell O'Leary, Nicola Benvenuti, James McGale, Daniel Rivaud, Sheldon Button
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Patent number: 8737198Abstract: Ethernet nodes, interconnected logically or physically to construct a closed loop, may be controlled using a control protocol that governs placement of blocks on the ring. The control protocol allows one of the nodes to be designated as a root node in normal operation. The root node will block data traffic on one of its ports on the ring to prevent a forwarding loop from being created on the ring. Each node on the ring performs link level connectivity detection and, upon detection of a failure, will send out a Failure Indication Message (FIM). When a node receives a FIM, it will flush its forwarding database associated with the ring and, if it is the root node, will remove the data block on the port. When the failure recovers, the nodes adjacent the failure will transmit a recovery indication message to allow the ring to revert to its normal state.Type: GrantFiled: February 7, 2008Date of Patent: May 27, 2014Assignee: Ciena CorporationInventors: Marc Holness, Donald Ellis, Nicola Benvenuti
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Patent number: 7643407Abstract: Protection transmission unit allocation, such as STS# in a SONET/SDH network utilizing time slot interchange on the working path, may be determined by disseminating connection information, connection identification information, and a prioritization scheme, to nodes on the network and allowing them to deterministically allocate protection transmission units to connections on the protection cycle. Network elements forming physical or logical rings may thus ascertain the location on protection for a given connection without requiring protection unit allocation to be disseminated from a central controller. Since each node is starting with the same connection information and running the same priority determination, each will end up with the same result and will know where to place and find connections on protection.Type: GrantFiled: January 29, 2004Date of Patent: January 5, 2010Assignee: Nortel Networks LimitedInventors: Nicola Benvenuti, David Steele
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Patent number: 7554905Abstract: A network control entity that has an input for receiving data indicative of an event associated with a first member of a virtual concatenation group transported through the network. The network control entity also has a processing entity for computing a new route for a second member of the virtual concatenation group, the computing being triggered by the event.Type: GrantFiled: May 12, 2004Date of Patent: June 30, 2009Assignee: Nortel Networks LimitedInventors: Nicolas Benvenuti, David Steele, Dino Fatica
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Patent number: 7180913Abstract: It is proposed that currently unused portions of transport overhead in frames sent on a high-speed outgoing channel be used to carry error count information from each of four low-speed input channels. At a 4:1 combiner, error monitoring bytes are extracted from transport overhead of frames received on each of the four input channels. Error counts are determined and accumulated for each input channel before being passed to a transport overhead generator for the outgoing channel, where they are inserted as bit patterns in unused portions of the transport overhead. At a receiving demultiplexer, the error counts are extracted from the transport overhead of incoming frames. The extracted error counts are then used to alter the error monitoring bytes included in the transport overhead of frames sent on each of four outgoing channels such that, at the far end of those outgoing channels, a correct number of errors for the three part path may be determined.Type: GrantFiled: September 25, 2001Date of Patent: February 20, 2007Assignee: Nortel Networks LimitedInventors: Nicola Benvenuti, James R. Mattson, Leroy A. Pick, Peter W. Phelps
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Publication number: 20050254522Abstract: A network control entity that has an input for receiving data indicative of an event associated with a first member of a virtual concatenation group transported through the network. The network control entity also has a processing entity for computing a new route for a second member of the virtual concatenation group, the computing being triggered by the event.Type: ApplicationFiled: May 12, 2004Publication date: November 17, 2005Inventors: Nicolas Benvenuti, David Steele, Dino Fatica
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Publication number: 20050198524Abstract: Protection transmission unit allocation, such as STS# in a SONET/SDH network utilizing time slot interchange on the working path, may be determined by disseminating connection information, connection identification information, and a prioritization scheme, to nodes on the network and allowing them to deterministically allocate protection transmission units to connections on the protection cycle. Network elements forming physical or logical rings may thus ascertain the location on protection for a given connection without requiring protection unit allocation to be disseminated from a central controller. Since each node is starting with the same connection information and running the same priority determination, each will end up with the same result and will know where to place and find connections on protection.Type: ApplicationFiled: January 29, 2004Publication date: September 8, 2005Applicant: Nortel Networks LimitedInventors: Nicola Benvenuti, David Steele
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Patent number: 6850253Abstract: A method, network management tool, graphical user interface or computer readable medium in which network link and connection information is represented by lines having different visual characteristics that are used to represent in-service links, out-of-service links, and connections. In particular, the lines representing the connections may overlay and cover or obscure one of the lines representing the in-service or out-of-service links while not covering or only partially covering the other. In a particular embodiment, out-of-service links are represented by thin broken lines, in-service links are represented by thick solid lines that are thicker than the thin broken lines, and connections are represented by thin solid lines that are at least as thick as the thin broken lines and have a pattern or color different from the thick solid lines and which may overlay and cover or obscure one of the lines representing the links.Type: GrantFiled: December 26, 2000Date of Patent: February 1, 2005Assignee: Nortel Networks LimitedInventors: Mark L. Bazerman, Richard P. Heaps, Nicola Benvenuti
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Publication number: 20030025960Abstract: It is proposed that currently unused portions of transport overhead in frames sent on a high-speed outgoing channel be used to carry error count information from each of four low-speed input channels. At a 4:1 combiner, error monitoring bytes are extracted from transport overhead of frames received on each of the four input channels. Error counts are determined and accumulated for each input channel before being passed to a transport overhead generator for the outgoing channel, where they are inserted as bit patterns in unused portions of the transport overhead. At a receiving demultiplexer, the error counts are extracted from the transport overhead of incoming frames. The extracted error counts are then used to alter the error monitoring bytes included in the transport overhead of frames sent on each of four outgoing channels such that, at the far end of those outgoing channels, a correct number of errors for the three part path may be determined.Type: ApplicationFiled: September 25, 2001Publication date: February 6, 2003Applicant: NORTEL NETWORKS LIMITEDInventors: Nicola Benvenuti, James R. Mattson, Leroy A. Pick, Peter W. Phelps