Patents by Inventor Nicola L'Insalata

Nicola L'Insalata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Synchronizing modules in an integrated circuit
    Patent number: 7518408
    Abstract: A synchronization system to synchronize modules (TX, RX) in an integrated circuit, such as a VLSI integrated circuit, in which the modules receive respective first and second clock signals (TX_CLK, RX_CLK) having a same frequency but being shifted by a constant and unknown phase difference. The system includes a first latch means for latching and delivering data in synchronism with the first clock signal and second latch means for latching data issued from the first latch means and delivering data in synchronism with the second clock signal, first and second latch means being controlled by first and second control signals (strobe_W, strobe_R) elaborated respectively from said first and second clock signals and one of said first and second control signal being shifted by an amount corresponding at least to the set-up time of at least one of said first and second latch means.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: April 14, 2009
    Assignee: STMicroelectronics SA
    Inventors: Riccardo Locatelli, Marcello Coppola, Daniele Mangano, Luca Fanucci, Franscesco Vitullo, Dario Zandri, Nicola L'Insalata
  • Synchronizing modules in an integrated circuit
    Publication number: 20080061835
    Abstract: A synchronization system to synchronize modules (TX, RX) in an integrated circuit, such as a VLSI integrated circuit, in which the modules receive respective first and second clock signals (TX_CLK, RX_CLK) having a same frequency but being shifted by a constant and unknown phase difference. The system includes a first latch means for latching and delivering data in synchronism with the first clock signal and second latch means for latching data issued from the first latch means and delivering data in synchronism with the second clock signal, first and second latch means being controlled by first and second control signals (strobe_W, strobe_R) elaborated respectively from said first and second clock signals and one of said first and second control signal being shifted by an amount corresponding at least to the set-up time of at least one of said first and second latch means.
    Type: Application
    Filed: September 11, 2007
    Publication date: March 13, 2008
    Applicant: STMicroelectronics SA
    Inventors: Riccardo Locatelli, Marcello Coppola, Daniele Mangano, Luca Fanucci, Franscesco Vitullo, Dario Zandri, Nicola L'Insalata