Patents by Inventor Nicola Pantaleo

Nicola Pantaleo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240028244
    Abstract: Methods of operating memory systems with input/output expanders for multi-channel status reads (and associated systems and devices) are disclosed herein. In one embodiment, a method comprises receiving, via a controller-side communication channel, a multi-channel status read command at a first interface of an input/output expander. The method further comprises, based at least in part on receiving the multi-channel status read command, (a) transmitting, via a second interface of the input/output expander, a status read command to logical units over each of two or more memory-side channels; (b) receiving, at the second interface, status read data from the logical units over each memory-side channel of the two or more memory-side channels; and (c) transmitting, via the first interface, the status read data onto the controller-side communication channel.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 25, 2024
    Inventors: Yoav Weinberg, Nicola Pantaleo, Leonid Minz
  • Patent number: 8829982
    Abstract: A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: September 9, 2014
    Assignee: Intel Corporation
    Inventors: Rajeevan Mahadevan, Antonios Pialis, Robert Wang, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Patent number: 8581644
    Abstract: A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: November 12, 2013
    Assignee: Intel Corporation
    Inventors: Robert Wang, Antonios Pialis, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Patent number: 8513995
    Abstract: System and method providing multiple circuit paths to control characteristics of periodic signals. In one embodiment first and second detector signals are indicative of a phase and frequency differences between the output signal and a reference signal. A first input signal based on the first detector signal adjusts the phase difference. A first control signal based on the second detector signal has frequency content in high and low frequency ranges. A second input signal based on the control signal reduces the frequency difference. A second control signal based on the second detector signal has relatively low frequency content in the high frequency range. A third input signal based on the second control signal reduces the frequency difference.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: August 20, 2013
    Assignee: Intel Corporation
    Inventors: Robert Wang, Antonios Pialis, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Patent number: 8432203
    Abstract: System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 30, 2013
    Assignee: Intel Corporation
    Inventors: Antonios Pialis, Robert Wang, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo, Mike Bichan
  • Publication number: 20130027097
    Abstract: System and method providing multiple circuit paths to control characteristics of periodic signals. In one embodiment first and second detector signals are indicative of a phase and frequency differences between the output signal and a reference signal. A first input signal based on the first detector signal adjusts the phase difference. A first control signal based on the second detector signal has frequency content in high and low frequency ranges. A second input signal based on the control signal reduces the frequency difference. A second control signal based on the second detector signal has relatively low frequency content in the high frequency range. A third input signal based on the second control signal reduces the frequency difference.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 31, 2013
    Inventors: Robert Wang, Antonios Pialis, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewics, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Publication number: 20130027096
    Abstract: System and circuitry controlling characteristics of periodic signals. In one embodiment adjustment circuitry modifies periodic signal characteristic. A phase detector generates analog input signals indicative of a phase difference between the periodic signal and a reference signal. Conversion circuitry translates the analog input signals into digital signals. Signal driving circuitry, comprising a current source, provides control signals to the signal driving circuitry based on the digital signals. First input circuitry provides a first adjustment signal to the adjustment circuitry. Second input circuitry provides a second adjustment signal to the adjustment circuitry in response to the control signal. The first adjustment signal is based on input of analog signals to a circuit element in the first input circuitry to control the first adjustment signal. The second input circuitry is responsive to the control signal to provide the second adjustment signal with the digital version of the input signals.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 31, 2013
    Inventors: Antonios Pialis, Robert Wang, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewics, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo, Mike Bichan
  • Publication number: 20130027098
    Abstract: A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 31, 2013
    Inventors: Robert Wang, Antonios Pialis, Rajeevan Mahadevan, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo
  • Publication number: 20130027119
    Abstract: A system and method providing power supply rejection. One embodiment provides for power supply rejection in PLL or DLL circuitry. First subcircuitry provides second subcircuitry a supply voltage which is a filtered version of power from an external source. The first subcircuitry includes a first field effect transistor and a first low pass filter coupled to receive a signal from the external power source during operation of the second subcircuitry. The filter is coupled to provide a filtered version of the power source signal to the gate of the first transistor, so that when a first source/drain region of the first transistor is connected to receive power from the external source and the gate of the first transistor receives the filtered version of the power source signal, the second source/drain region of the first transistor provides a first modified version of the power received from the external source.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 31, 2013
    Inventors: Rajeevan Mahadevan, Antonios Pialis, Robert Wang, Navid Yaghini, Rafal Karakiewicz, Raymond Kwok Kei Tang, Sida Shen, Mark Andruchow, Zhuobin Li, Nicola Pantaleo