Patents by Inventor Nicolas B. Cobb

Nicolas B. Cobb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10354044
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: July 16, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Publication number: 20170270235
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Application
    Filed: June 7, 2017
    Publication date: September 21, 2017
    Applicant: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Patent number: 9703922
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: July 11, 2017
    Assignee: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Publication number: 20160283645
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Application
    Filed: June 6, 2016
    Publication date: September 29, 2016
    Applicant: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Patent number: 9361422
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: June 7, 2016
    Assignee: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Publication number: 20140143741
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Application
    Filed: October 21, 2013
    Publication date: May 22, 2014
    Applicant: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Patent number: 8566753
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: October 22, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Publication number: 20110191726
    Abstract: After layout design data has been modified using an OPC process, a repair flow is initiated. This repair flow includes analyzing the modified data to identify any remaining or new potential print errors in the layout data. Regions then are formed around the identified potential print errors, and a subsequent OPC process is performed only on the data within these regions using a different set of process parameters from the process parameters employed by the initial OPC process. This repair flow is iteratively repeated, where a different set of process parameter values for the subsequent OPC process is used during each iteration.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Inventors: James C. WORD, Dragos S. DUDAU, Nicolas B. COBB
  • Publication number: 20110161894
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 30, 2011
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Patent number: 7945871
    Abstract: An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and OPC verification and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: May 17, 2011
    Inventors: Nicolas B. Cobb, Eugene Miloslavsky
  • Patent number: 7926002
    Abstract: After layout design data has been modified using an OPC process, a repair flow is initiated. This repair flow includes analyzing the modified data to identify any remaining or new potential print errors in the layout data. Regions then are formed around the identified potential print errors, and a subsequent OPC process is performed only on the data within these regions using a different set of process parameters from the process parameters employed by the initial OPC process. This repair flow is iteratively repeated, where a different set of process parameter values for the subsequent OPC process is used during each iteration.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: April 12, 2011
    Assignee: Mentor Graphics Corporation
    Inventors: James C. Word, Dragos S. Dudau, Nicolas B. Cobb
  • Patent number: 7861207
    Abstract: A method of performing a resolution enhancement technique such as OPC on an initial layout description involves fragmenting a polygon that represents a feature to be created into a number of edge fragments. One or more of the edge fragments is assigned an initial simulation site at which the image intensity is calculated. Upon calculation of the image intensity, the position and/or number of initial simulation sites is varied. New calculations are made of the image intensity with the revised placement or number of simulation sites in order to calculate an OPC correction for the edge fragment. In other embodiments, fragmentation of a polygon is adjusted based on the image intensities calculated at the simulation sites. In one embodiment, the image intensity gradient vector calculated at the initial simulation sites is used to adjust the simulation sites and/or fragmentation of the polygon.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: December 28, 2010
    Assignee: Mentor Graphics Corporation
    Inventors: James Word, Nicolas B. Cobb, Patrick J. LaCour
  • Publication number: 20080256500
    Abstract: An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and OPC verification and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.
    Type: Application
    Filed: June 24, 2008
    Publication date: October 16, 2008
    Inventors: Nicolas B. Cobb, Eugene Miloslavsky
  • Patent number: 7412676
    Abstract: An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and OPC verification and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: August 12, 2008
    Inventors: Nicolas B Cobb, Eugene Miloslavsky
  • Patent number: 7324930
    Abstract: A method of preparing a file that stores layout of devices to be created with photolithography for optical and process correction (OPC). Polygons that define structures to be created are initially fragmented into edge segments and a simulation of how the edge segments will be printed under process conditions is performed. The results of the simulation are used to adjust/refragment the edge segments. In one embodiment, the curvature of light intensity at the edge segments is used to adjust the fragmentation of the polygons.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: January 29, 2008
    Inventor: Nicolas B. Cobb
  • Patent number: 7240321
    Abstract: A tool for optimizing the layout of a microdevice adds fragmentation points to polygons in a first hierarchical database layer in a manner suitable for application of a tool to apply a resolution enhancement technique (RET) such as optical and process correction (OPC). Portions of polygons in a database level that interact with polygons of a second level in the database are promoted to the second database level, and refragmented. The RET operates on the polygons of the first and second levels of the database to determine how polygons of each of the first and second levels should be adjusted, if necessary, such that the layout is optimized.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: July 3, 2007
    Inventors: Nicolas B. Cobb, Laurence W. Grodd, George P. Lippincott, Emile Sahouria
  • Patent number: 7237221
    Abstract: A method for performing a matrix-based verification technique such as optical process correction (OPC) that analyzes interactions between movement of a fragment on a mask and one or more edges to be created on a wafer. In one embodiment, each edge to be created is analyzed and one or more fragments of a mask are moved in accordance with a gradient matrix that defines how changes in position of a fragment affect one or more edges on the mask. Fragments are moved having a significant effect on an edge in question. Simulations are performed and fragments are moved in an iterative fashion until each edge has a objective within a prescribed tolerance. In another embodiment, each edge has two or more objectives to be optimized. A objective is selected in accordance with a cost function and fragments are moved in a mask layout until each edge has acceptable specification for each objective.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: June 26, 2007
    Inventors: Yuri Granik, Nicolas B Cobb
  • Patent number: 7234130
    Abstract: A method and apparatus for compensating for flare intensity variations across an integrated circuit. A layout description for a physical layer of an integrated circuit or portion thereof is divided into a number of regions such as adjacent tiles. An estimate of the flare intensity in each region is determined. The flare intensity values calculated are divided into a number of ranges. In one embodiment, a data layer in a layout description is defined for each range of flare values computed. Features to be printed in an area having a flare value in a particular range are associated with a corresponding additional data layer. The features associated with each additional data layer are analyzed with a resolution enhancement technique that is selected or adjusted to compensate for differing flare values occurring in the integrated circuit.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: June 19, 2007
    Inventors: James Word, Nicolas B. Cobb, Yuri Granik
  • Patent number: 7155699
    Abstract: An EDA tool is provided with an OPC module that performs optical and/or process pre-compensations on an IC mask layout in a streamlined manner, reusing determined corrections for a first area on a second area, when the second area is determined to be equivalent to the first area for OPC purposes. The OPC module performs the correction on the IC mask layout on an area-by-area basis, and the corrections are determined iteratively using model-based simulations, which in one embodiment, include resist model-based simulations as well as optical model-based simulations.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: December 26, 2006
    Inventor: Nicolas B. Cobb
  • Patent number: 7073162
    Abstract: A method for processing objects to be created via photolithography. Each object to be created is defined as a polygon that is fragmented into a number of edge segments that extend around the perimeter of the polygon. At least some of the edge segments have an associated control site where the edge placement error for the edge segment is to be minimal. A smoothing filter is applied to the polygon to identify those control sites that may cause an OPC tool to produce erroneous results. The identified control sites are moved and/or eliminated from the polygon, and polygon and the adjusted control sites are supplied to an OPC tool.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: July 4, 2006
    Assignee: Mentor Graphics Corporation
    Inventors: Nicolas B. Cobb, Eugene Miloslavsky