Abstract: Step 2 demodulation is conventionally performed using a secondary synchronization channel that correlates a received signal at a known time slot location against each of a plurality of sequences associated with the secondary synchronization code. The disclosed implementation proposes the use of a different synchronization channel to complete the step 2 process. More specifically, a complete synchronization channel correlator is used for the demodulation where the received signal at the known time slot location is correlated against a combination of the primary synchronization code and each of the plurality of secondary synchronization codes. This combined correlation produces enhanced step 2 performance in terms of acquisition time or signal-to-noise ratio.

Abstract: A digital matched filter receives an input signal in natural order, correlates the input signal against a code and generates a filtered output signal in a permuted order with respect to the input signal. The code is a factorization of a first and second patterns. The filter includes a first filter to correlate against the first code and a second filter to correlate against the second pattern. A memory is included to store intermediate values produced from the first filter correlation operation. Certain ones of the intermediate values are selectively retrieved from memory in accordance with a unique addressing scheme for each second filter correlation operation. More specifically, the addressing scheme allows retrieved intermediate values to be reused in successive second filter correlations. The permuted order outputs of the filter are of no concern in many applications, like cell searching, where buffering is available.

Abstract: Step 2 demodulation is conventionally performed using a secondary synchronization channel that correlates a received signal at a known time slot location against each of a plurality of sequences associated with the secondary synchronization code. The disclosed implementation proposes the use of a different synchronization channel to complete the step 2 process. More specifically, a complete synchronization channel correlator is used for the demodulation where the received signal at the known time slot location is correlated against a combination of the primary synchronization code and each of the plurality of secondary synchronization codes. This combined correlation produces enhanced step 2 performance in terms of acquisition time or signal-to-noise ratio.

Abstract: A digital matched filter receives an input signal in natural order, correlates the input signal against a code and generates a filtered output signal in a permuted order with respect to the input signal. The code is a factorization of a first and second patterns. The filter includes a first filter to correlate against the first code and a second filter to correlate against the second pattern. A memory is included to store intermediate values produced from the first filter correlation operation. Certain ones of the intermediate values are selectively retrieved from memory in accordance with a unique addressing scheme for each second filter correlation operation. More specifically, the addressing scheme allows retrieved intermediate values to be reused in successive second filter correlations. The permuted order outputs of the filter are of no concern in many applications, like cell searching, where buffering is available.