Patents by Inventor Nicolas Graffet

Nicolas Graffet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Direct memory access controller
    Patent number: 9442873
    Abstract: Systems and methods for direct memory access are described. One example system includes a memory module that includes a first memory portion that maintains transfer descriptors of direct memory access (DMA) channels, and a second memory portion that maintains transfer descriptors of enabled DMA channels. The system includes a controller coupled to the memory module, the controller includes one or more DMA channels coupled to a system bus, a channel arbiter that selects one of the enabled DMA channels as an active DMA channel for data transfer including re-arbitrating after each burst or beat in a given transfer, and an active channel buffer that receives a transfer descriptor of the active DMA channel from the second memory portion. The controller is configured to write back the transfer descriptor of the active DMA channel into the second memory portion when the active DMA channel loses arbitration.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: September 13, 2016
    Assignee: Atmel Corporation
    Inventors: Laurentiu Birsan, Frode Milch Pedersen, Nicolas Graffet, Stein Danielsen, Sebastien Jouin
  • DIRECT MEMORY ACCESS CONTROLLER
    Publication number: 20150026383
    Abstract: Systems and methods for direct memory access are described. One example system includes a memory module that includes a first memory portion that maintains transfer descriptors of direct memory access (DMA) channels, and a second memory portion that maintains transfer descriptors of enabled DMA channels. The system includes a controller coupled to the memory module, the controller includes one or more DMA channels coupled to a system bus, a channel arbiter that selects one of the enabled DMA channels as an active DMA channel for data transfer including re-arbitrating after each burst or beat in a given transfer, and an active channel buffer that receives a transfer descriptor of the active DMA channel from the second memory portion. The controller is configured to write back the transfer descriptor of the active DMA channel into the second memory portion when the active DMA channel loses arbitration.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 22, 2015
    Inventors: Laurentiu BIRSAN, Frode Milch PEDERSEN, Nicolas GRAFFET, Stein DANIELSEN, Sebastien JOUIN
  • Direct memory access controller
    Patent number: 8880756
    Abstract: Systems and methods for direct memory access are described. One example system includes a memory module that includes a first memory portion that maintains transfer descriptors of direct memory access (DMA) channels, and a second memory portion that maintains transfer descriptors of enabled DMA channels. The system includes a controller coupled to the memory module, the controller includes one or more DMA channels coupled to a system bus, a channel arbiter that selects one of the enabled DMA channels as an active DMA channel for data transfer including re-arbitrating after each burst or beat in a given transfer, and an active channel buffer that receives a transfer descriptor of the active DMA channel from the second memory portion. The controller is configured to write back the transfer descriptor of the active DMA channel into the second memory portion when the active DMA channel loses arbitration.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: November 4, 2014
    Assignee: Atmel Corporation
    Inventors: Laurentiu Birsan, Frode Milch Pedersen, Nicolas Graffet, Stein Danielsen, Sebastien Jouin