Abstract: A quantum measurement circuit implements a hypergraph product code (HPG). A syndrome can be extracted from the circuit by preparing a readout qubit of the quantum measurement circuit in a known state, preparing a row-based measurement gadget, and preparing a column-based measurement gadget in the quantum measurement circuit. The row-based measurement gadget entangles the readout qubit with a first subset of the target set of data qubits in a same row of the quantum measurement circuit as the readout qubit, and the column based gadget entangles the readout qubit with a second subset of the target set of data qubits in a same column of the quantum measurement circuit as the readout qubit. The syndrome is extracted by measuring the readout qubit to extract the parity of the target set of data qubits.

Abstract: A computing system is provided, including one or more processing devices. The one or more processing devices are configured to receive quantum circuit parameters including a code parameter of an error correction code and a number of T gates included in a quantum circuit. The one or more processing devices are further configured to receive respective decoder parameters of each of a plurality of candidate decoders. The decoder parameters include a physical noise rate of a plurality of physical qubits at which the quantum circuit is configured to be executed and a stopping time of the candidate decoder. The one or more processing devices are further configured to compute respective spacetime costs of the candidate decoders based on the quantum circuit parameters and the decoder parameters. The one or more processing devices are further configured to output a selection of a lowest-spacetime-cost decoder for implementation at a quantum computing device.

Abstract: A method to forecast the result of a Clifford circuit acting on the qubits comprises: for a fault operator F acting on the qubits, precomputing a backward cumulant of the fault operator for each row u of binary matrices Ms and Ml, the backward cumulant reflecting an effect f=effm(F) on measurement outcomes of the qubits according to the Clifford circuit and fault operator; sampling the fault operator F for the qubits according to the predetermined noise distribution in the Clifford circuit; computing a syndrome s=Msf corresponding to the effect based on a commutator of the backward cumulant versus a row of the binary matrix Ms; computing a set of logical flips f=Mlf corresponding to the effect based on a commutator of the backward cumulant versus a row of the binary matrix Ml; and returning the result based on the syndrome and on the set of logical flips.

Abstract: A method to correct a fault in the application of a Clifford circuit to a qubit register of a quantum computer comprises: (a) receiving circuit data defining the Clifford circuit; (b) receiving additional data identifying one or more measurements belonging to each of a plurality of faces of a lattice; (c) emitting an outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome for the application of the Clifford circuit to the qubit register; and (d) emitting a topological outcome code based on the circuit data, the additional data, and the outcome code, the topological outcome code including a series of check operators that support quantum-error correction via a topological decoder, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Abstract: A quantum computing device is provided, including a logical qubit encoding surface including a plurality of plaquettes. Each plaquette of the plurality of plaquettes may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancilla qubit. The first ancilla qubit may be electrically connected to the four data qubits and a second ancilla qubit included in the logical qubit encoding surface.

Abstract: A method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer comprises: (A) receiving circuit data defining the Clifford circuit; (B) emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and (C) emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Abstract: A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

Abstract: A quantum computing device comprises at least one quantum register including l logical qubits, where l is a positive integer. The quantum computing device further includes a set of d decoder blocks coupled to the at least one quantum register, where d<2*l. In this way, the decoder blocks may share decoding requests generated by the logical qubits.

Abstract: A method to build a lookup decoder for mapping error syndromes based on quantum-stabilizer code to corresponding error corrections comprises (A) enumerating a subset of error syndromes up to a maximum error weight based on the quantum-stabilizer code; (B) iterating through the subset of error syndromes to compute an error state of highest probability for each error syndrome of the subset, where the error state defines error in a qubit register of a quantum computer; and (C) for each error syndrome of the subset of error syndromes, storing in classical computer memory an error correction based on the error state of highest probability and mapped to that error syndrome.

Abstract: A method to correct a fault in application of a Clifford circuit to a qubit register of a quantum computer comprises: (A) receiving circuit data defining the Clifford circuit; (B) emitting outcome code based on the circuit data, the outcome code including a series of outcome checks each corresponding to an anticipated error syndrome of the application of the Clifford circuit to the qubit register; and (C) emitting space-time quantum code corresponding to the Clifford circuit based on the circuit data and on the outcome code, the space-time quantum code including a series of check operators that support quantum-error correction, thereby enabling fault correction in the application of the Clifford circuit to the qubit register.

Abstract: A method to build a lookup decoder for mapping error syndromes based on quantum-stabilizer code to corresponding error corrections comprises (A) enumerating a subset of error syndromes up to a maximum error weight based on the quantum-stabilizer code; (B) iterating through the subset of error syndromes to compute an error state of highest probability for each error syndrome of the subset, where the error state defines error in a qubit register of a quantum computer; and (C) for each error syndrome of the subset of error syndromes, storing in classical computer memory an error correction based on the error state of highest probability and mapped to that error syndrome.

Abstract: A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

Abstract: A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

Abstract: A quantum computing device is provided, including a logical qubit encoding surface including a plurality of plaquettes. Each plaquette of the plurality of plaquettes may include a plurality of measurement-based qubits. The plurality of measurement-based qubits may include four data qubits and a first ancilla qubit. The first ancilla qubit may be electrically connected to the four data qubits and a second ancilla qubit included in the logical qubit encoding surface.

Abstract: A quantum decoder receives a syndrome from a quantum measurement circuit and performs various decoding operations for processing-efficient fault detection. The decoding operations include generating a decoding graph from the syndrome and growing a cluster around each one of multiple check nodes in the graph that correspond to a non-trivial value in the syndrome. Each cluster includes the check node corresponding to the non-trivial value and a set of neighboring nodes positioned within a distance of d edge-lengths from the check node. Following cluster growth, the decoder determines if, for each cluster, there exists a solution set internal to the cluster that fully explains the non-trivial syndrome bit for the cluster. If so, the decoder identifies and returns at least one solution set that fully explains the set of non-trivial bits in the syndrome.

Abstract: A quantum computing system computes soft information quantifying an effect of soft noise on multiple rounds of a syndrome measurement that is output by a quantum measurement circuit. The soft noise arises due to imperfections in a readout device that introduce variability in repeated measurements of ancilla qubits and is distinct from quantum noise arising from bit-flips in data qubits that are indirectly measured by the ancilla qubits. The quantum computing system applying decoding logic to identify fault locations within the quantum measurement circuit based on the computed soft information.

Abstract: A quantum computing device comprises a surface code lattice that includes/logical qubits, where/is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the/logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.

Abstract: A disclosed methodology for syndrome extraction in a quantum measurement circuit includes generating a graph representing a code implemented by the quantum measurement circuit. The graph includes bit nodes corresponding to data qubits in the quantum measurement circuit, check nodes corresponding to syndrome qubits in the quantum measurement circuit, and edges between the bit nodes and check nodes that are each associated with a stabilizer measurement provided by the code. The methodology provides for assigning each of the different edges in the graph to a select one of “G” number of different edge types and performing at least G-number of temporally-separated rounds of qubit operations that each enact concurrent multi-qubit operations on endpoints of a subset of the edges assigned to a same one of the G different edge types.

Abstract: A quantum computing system includes a decoding unit that implements a low-cost “isolated fault decoder” in-line with a more sophisticated decoder in order to significantly reduce bandwidth consumption and a requisite amount of decoding hardware to perform error correction that achieves a target error correction rate. The isolated fault decoder receives a syndrome from a measurement circuit of the quantum computing system and implements logic to attempt to identify a set of faults that explain the syndrome and that also satisfy a fault isolation threshold restricting a proximity between each pair of faults in the set.

Abstract: A quantum computing system implementing surface code in a measurement circuit may be configured to translate a quantum algorithm including at least one Hadamard gate into an equivalent circuit that lacks a Hadamard gate, the circuit including Hadamard-conjugated Pauli measurements that include joint logical measurements implemented on diagonally-arranged patches of the surface code.