Abstract: A power switching circuit has high and low side switches (6, 8). The load-side FET (8) has a main body part (30) and a sense FET part (32). The current sensing circuit (32) measured the low side current. A capacitance (56) couples the switch node (10) to a current signal node (52) to provide a combined signal on current output (58), the combined signal including the low side current and timing information.

Abstract: In a multi-chip module semiconductor device (1), at least one first semiconductor die (20) is mounted on the base portion (11) of a lead-frame (10). A flip chip IC die (30) is mounted by first bump electrodes (31) to electrode contacts (G, S?) on the at least one first die (20) and by second bump electrodes (32) to terminal pins (14) of the lead frame. The integrated circuit of the flip chip (30) does not require any lead-frame base-portion area for mounting, and low impedance circuit connections are provided by the bump electrodes (31, 32). The first die (20) may be a MOSFET power switching transistor, with a gate driver circuit in the flip chip (30). The circuit impedance for the switching transistor may be further reduced by having distributed parallel gate connections (G), which may alternate with distributed parallel source connections (S?), and furthermore by having distributed and alternating power supply connections (VCC, GND).

Abstract: A switching circuit for switching an input dc voltage of predetermined polarity is used, for example, for a synchronous dc-dc converter. The switching circuit is divided between a high side package (52) and a low side package (56) each having a logic input (90) and a switch (6,8) connected between switching outputs (84,86). The switching outputs (84,86) of the high and low side packages (52,56) are connected in series between input voltage terminals (4,2). A pulse width modulator (18) is connected to the logic inputs (90) of the packages for supplying an alternating control signal for switching the high and low side switches (6,8) alternately. Each of the high and low side packages (52,56) contains logic circuitry (150) for controlling the respective switch (6,8) based solely on the voltages on the respective logic input (90) and respective switching outputs (84,86) to prevent the switches (6,8) in the high and low side packages (52,56) from conducting at the same time.

Abstract: A synchronous dc—dc converter converts an input dc voltage to an output dc voltage. A control FET (6) and a sync FET (8) are connected in series between input dc voltage terminals (2,4). An alternating control signal input from a control circuit (18) controls the control and sync FETs (6,8) to be switched on alternately. At least one driver (30, 32) is provided to drive the FETs (6,8). In response to a change in the alternating control signal of a predetermined polarity, the driver (32) switches off the sync FET (8), and then the driver (30) waits for the trigger signal before switching on the control FET (6).

Abstract: An integrated driver circuit includes a low side component and a synchronous dc voltage converter circuit. A sync FET (8) is controlled by a driver (32) powered between high and low voltage power connections (134, 138). A timing circuit (150) controls the driver circuit in accordance with a signal on a control input. The driver circuit (32) is isolated from the timing circuit (150), for example by a level shift circuit (136) and the low voltage power connection (138) of the driver circuit is directly connected to the source (108) of the sync FET (8). This arrangement is intended to reduce transient voltage effects.

Abstract: In a multi-chip module semiconductor device (1), at least one first semiconductor die (20) is mounted on the base portion (11) of a lead-frame (10). A flip chip IC die (30) is mounted by first bump electrodes (31) to electrode contacts (G, S′) on the at least one first die (20) and by second bump electrodes (32) to terminal pins (14) of the lead frame. The integrated circuit of the flip chip (30) does not require any lead-frame base-portion area for mounting, and low impedance circuit connections are provided by the bump electrodes (31, 32). The first die (20) may be a MOSFET power switching transistor, with a gate driver circuit in the flip chip (30). The circuit impedance for the switching transistor may be further reduced by having distributed parallel gate connections (G), which may alternate with distributed parallel source connections (S′), and furthermore by having distributed and alternating power supply connections (VCC, GND).

Abstract: The invention relates to a low side component and a synchronous dc voltage converter circuit. A sync FET (8) is controlled by a driver (32) powered between high and low voltage power connections (134, 138). A timing circuit (150) controls the driver circuit in accordance with a signal on a control input. The driver circuit (32) is isolated from the timing circuit (150), for example by a level shift circuit (136) and the low voltage power connection (138) of the driver circuit is directly connected to the source (108) of the sync FET (8). This may reduce transient voltage effects.

Abstract: A synchronous dc-dc converter converts an input dc voltage to an output dc voltage. A control FET (6) and a sync FET (8) are connected in series between input dc voltage terminals (2,4). An alternating control signal input from a control circuit (18) controls the control and sync FETs (6,8) to be switched on alternately. At least one driver (30, 32) is provided to drive the FETs (6,8). In response to a change in the alternating control signal of a predetermined polarity, the driver (32) switches off the sync FET (8), and then the driver (30) waits for the trigger signal before switching on the control FET (6).

Abstract: A switching circuit for switching an input dc voltage of predetermined polarity is used, for example, for a synchronous dc-dc converter. The switching circuit is divided between a high side package (52) and a low side package (56) each having a logic input (90) and a switch (6,8) connected between switching outputs (84,86). The switching outputs (84,86) of the high and low side packages (52,56) are connected in series between input voltage terminals (4,2). A pulse width modulator (18) is connected to the logic inputs (90) of the packages for supplying an alternating control signal for switching the high and low side switches (6,8) alternately. Each of the high and low side packages (52,56) contains logic circuitry (150) for controlling the respective switch (6,8) based solely on the voltages on the respective logic input (90) and respective switching outputs (84,86) to prevent the switches (6,8) in the high and low side packages (52,56) from conducting at the same time.