Patents by Inventor Nicolas Rigoni

Nicolas Rigoni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348150
    Abstract: A magnetic field sensor that detects an angle of a target includes a first channel having first and second magnetic field sensing elements that are orthogonal with respect to each other and produce first and second magnetic field signals, and a second channel having third and fourth magnetic field sensing elements that are orthogonal with respect to each other and produce third and fourth magnetic field signals. The third sensing element is positioned at an angle (e.g., 45-degrees) with respect to the first sensing element. The magnetic field sensor includes a low power mode circuit that uses comparators to compare the first, second, third, and fourth magnetic field signals to a first, second, third, and fourth threshold, respectively. A processor is configured to use an output of the low power mode circuit to determine the angle of the target.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Juan Manuel Cesaretti, Nicolas Rigoni, Jesse Lapomardo
  • Patent number: 10706948
    Abstract: A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whether to provide a default value to a functional logic based upon the provided blocking bit.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: July 7, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Nicolas Rafael Biberidis, Octavio H. Alpago, Nicolas Rigoni
  • Publication number: 20200020412
    Abstract: A method for multi-level memory safety for a sensor integrated circuit can include loading a blocking bit into a volatile memory from a non-volatile memory and providing the blocking bit to a gating circuit from the volatile memory. Further, the method may include the gating circuit determining whether to provide a default value to a functional logic based upon the provided blocking bit.
    Type: Application
    Filed: July 12, 2018
    Publication date: January 16, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Nicolas Rafael Biberidis, Octavio H. Alpago, Nicolas Rigoni
  • Patent number: 10325836
    Abstract: An integrated circuit with transmission line error detection comprises a substrate, a package enclosing the substrate, a lead extending from the inside of the package to the outside of the package, and a circuit supported by the substrate. The circuit includes an input circuit and an output circuit. A first wire is coupled between the output circuit and the lead and a second wire is coupled between the lead and the input circuit so that the input circuit receives a signal generated by the output circuit after the signal has been transmitted across the first and second wires.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: June 18, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Nicolas Rigoni, Juan Manuel Cesaretti, Brian Bernier
  • Publication number: 20190113592
    Abstract: A magnetic field sensor includes a first magnetic field sensing element first generating a first signal having a first axis of maximum sensitivity, a second magnetic field sensing element for generating a second signal and having a second axis of maximum sensitivity, one or more detectors for receiving an output of the first magnetic field sensing element or the second magnetic field sensing element, and a processor that receives an output of the one or more detectors and uses the output of the one or more detectors to calculate a first constant Kc and a second constant Ks and then uses Kc and Ks to compensate for an orthogonality error between the first axis of maximum sensitivity and second axis of maximum sensitivity. The detectors include peak detectors and/or zero-crossing detectors that compare the output of the first input signal or the second input signal with a threshold or zero.
    Type: Application
    Filed: December 10, 2018
    Publication date: April 18, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Nicolas Rigoni, Octavio H. Alpago, Nicolas Rafael Biberidis, HernĂ¡n D. Romero