Patents by Inventor Nicolas Szydlo

Nicolas Szydlo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6815716
    Abstract: The invention concerns an active TFT matrix for optical sensor comprising a substrate, a TFT transistor matrix formed on said substrate, a set of transistor control lines (3): a conductor level (4) according to a specific pattern forming an electrode array (5), each electrode (5) defining a zone called pixel: a set of columns (10) for load transfer between the electrodes (5) and an external electronics. The pixel electrode (5) is located entirely inside an outline delimited by two lines (3) and two successive columns (10), a protective gap (g1, g2) being provided between the inside edge of said outline and the periphery of the pixel (5) such that the pixel electrode (5) does not cover either the lines (3) or the columns (10).
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: November 9, 2004
    Assignee: Thales Avionics LCD S.A.
    Inventors: Eric Sanson, Nicolas Szydlo
  • Publication number: 20040036092
    Abstract: The invention concerns an active TFT matrix for optical sensor comprising a substrate, a TFT transistor matrix formed on said substrate, a set of transistor control lines (3): a conductor level (4) according to a specific pattern forming an electrode array (5), each electrode (5) defining a zone called pixel: a set of columns (10) for load transfer between the electrodes (5) and an external electronics. The pixel electrode (5) is located entirely inside an outline delimited by two lines (3) and two successive columns (10), a protective gap (g1, g2) being provided between the inside edge of said outline and the periphery of the pixel (5) such that the pixel electrode (5) does not cover either the lines (3) or the columns (10).
    Type: Application
    Filed: March 18, 2003
    Publication date: February 26, 2004
    Inventors: Eric Sanson, Nicolas Szydlo
  • Patent number: 6174745
    Abstract: A method is provided for manufacturing, in four masking steps, an active matrix for a liquid crystal display screen whose control transistors are of the top-gate type. The liquid crystal display screen obtained by means of this method is particularly suitable for use in image projection systems. The method comprises the steps of: depositing and etching a first opaque layer on a transparent insulating plate; depositing an insulating transparent layer; depositing and etching a transparent conductor; selectively depositing an ohmic contact and subsequently depositing an intrinsic semiconductor material and a gate insulating material, and first etching of the assembly, depositing and etching an opaque conducting layer, and etching of the semiconductor layer and gate insulating layer by using as a mask the etched opaque conducting layer.
    Type: Grant
    Filed: October 7, 1997
    Date of Patent: January 16, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Nicolas Szydlo, François Templier, Jean-Michel Vignolle
  • Patent number: 5830785
    Abstract: The present invention can be used to make integrated circuits on the same substrate as the active matrix owing to the possibility that it offers of connecting transistor gates to sources or drains of the same or other transistors, and thus be used in a "integrated drivers" technology. It is also possible to make different types of transistors and capacitances using this method, without adding any additional mask levels.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: November 3, 1998
    Assignee: Thomson LCD
    Inventors: Eric Sanson, Nicolas Szydlo, Bernard Hepp
  • Patent number: 4810637
    Abstract: A method of fabrication of non-linear control elements as applicable to electrooptical displays and in particular to large-area liquid-crystal displays of the flat-panel type, in which the following layers are stacked successively on a substrate: a first layer of metallic material, a first layer of undoped amorphous semiconductor material, a layer of doped amorphous semiconductor material, a second layer of undoped amorphous semiconductor material, and a second layer of metallic material.
    Type: Grant
    Filed: January 27, 1988
    Date of Patent: March 7, 1989
    Assignee: Thomson-Csf
    Inventors: Nicolas Szydlo, Jean N. Perbet, Rolande Kasprzak
  • Patent number: 4736234
    Abstract: In a light image detector, a substrate is covered with a first layer of conductive material on which is formed a two-dimensional matrix array of photodiodes in the form of pads arranged in rows and columns and each comprising a layer of amorphous semiconductor material doped with a predetermined type (n-type or p-type), a layer of undoped amorphous semiconductor material, a layer of amorphous semiconductor material doped with another predetermined type (n-type or p-type), a second layer of conductive material, each photodiode being insulated from adjacent photodiodes by means of insulating material. On the insulating material, columns of material are disposed along the columns of photodiodes and are each formed by a layer of metallic material and a layer of doped amorphous semiconductor material.
    Type: Grant
    Filed: July 16, 1986
    Date of Patent: April 5, 1988
    Assignee: Thomson-CSF
    Inventors: Francois Boulitrop, Eric Chartier, Nicolas Szydlo, Bernard Hepp, Nicole Proust
  • Patent number: 4728997
    Abstract: A method of fabricating a light image detector is provided in which there are deposited on a substrate a layer of a conducting material then successively p.sup.+ doped, undoped, n.sup.+ doped, undoped, then p.sup.+ doped semiconductor layers. Then at least one column of material is etched in these layers. The in the column thus obtained, individual detectors are formed solely in the semiconductor layers. The sides of the individual detectors are then irradiated. Finally, line electrodes are deposited in contact with the upper parts of the detectors not covered with an isolating layer.
    Type: Grant
    Filed: August 12, 1986
    Date of Patent: March 1, 1988
    Assignee: Thomson-CSF
    Inventors: Nicolas Szydlo, Francois Boulitrop
  • Patent number: 4704784
    Abstract: The invention relates to a method for the manufacture of field effect transistors of the coplanar and self-aligned type, obtained in thin film form on an insulating substrate.As a result of electrode self-alignment and ion implantation, the method makes it possible to use only three masking levels.The invention is applicable to the field of large surface microelectronics and particularly to the control and addressing of a flat liquid crystal screen or an image sensor.
    Type: Grant
    Filed: June 19, 1985
    Date of Patent: November 10, 1987
    Assignee: Thomson-CSF
    Inventors: Nicolas Szydlo, Francois Boulitrop, Rolande Kasprzak
  • Patent number: 4685195
    Abstract: The invention relates to a method for the manufacture of thin film field effect transistors of the type having self-alignment of the electrodes and obtained on an insulating substrate.The method comprises two constructional variants making it possible to produce a submicron gate electrode determining a minimum channel length.The invention is applicable to the field of large surface or area microelectronics and in particular to the control and addressing of a flat liquid crystal screen or an image sensor.
    Type: Grant
    Filed: June 11, 1985
    Date of Patent: August 11, 1987
    Assignee: Thomson-CSF
    Inventors: Nicolas Szydlo, Francois Boulitrop
  • Patent number: 4653858
    Abstract: Diode-type control matrix arrays for electrooptical flat-panel screens which find application in liquid-crystal displays are fabricated by depositing a layer of conductive material on a substrate and etching the control electrodes and control leads in this layer. The entire structure is then coated with an undoped amorphous semiconductor layer, with a doped amorphous semiconductor layer, and with a second layer of conductive material. In these three layers are etched terminal areas (or control elements) for connecting the control electrodes to the control leads.
    Type: Grant
    Filed: March 31, 1986
    Date of Patent: March 31, 1987
    Assignee: Thomson-CSF
    Inventors: Nicolas Szydlo, Jean N. Perbet, Nicole Proust
  • Patent number: 4643527
    Abstract: The invention relates to a process for the production of a substrate for an electrically controlled device such as a display screen, said substrate integrating non-linear elements and control elements of the elementary display points. The invention relates to the production of a substrate, in its active part, has non-linear elements associated with each image element and produced from amorphous silicon and, in its peripheral part, polycrystalline silicon controlled elements. Initially the substrate has amorphous silicon layers, the peripheral crystallization being obtained by annealing in a temperature gradient furnace.
    Type: Grant
    Filed: August 20, 1984
    Date of Patent: February 17, 1987
    Assignee: Thomson-CSF
    Inventors: Jose Magarino, Nicolas Szydlo, Michel Hareng, Pierre Landouar
  • Patent number: 4149095
    Abstract: An electret consisting of a conductive electrode embedded in insulating materials, is provided. In comparison with conventional electrets comprising a dielectric storage member, this electret exhibits a much higher capacity. Moreover it can be manufactured together with an integrated circuit incorporating the structure according to the invention, onto its substrate. For charging the electret an electrolytic process is utilized, if necessary through an opening perforated in the upper insulating layer. In the latter case the metal constituting the electrode can be advantageously be oxidized by anodic oxidation. The lifetime is improved by the oxide layer.
    Type: Grant
    Filed: April 8, 1976
    Date of Patent: April 10, 1979
    Assignee: Thomson-CSF
    Inventors: Raymond Poirier, Nicolas Szydlo
  • Patent number: 4123687
    Abstract: Display system using low energy electrons which are produced in the discharge of gases (plasma). For this purpose there is formed a matrix of cells each comprising a cathode, a glass block, hollowed out in its center for receiving a plasma of helium, an assembly constituted by an anode and a luminophore support separated by an insulator, and a grid wire coated with an insulator. The electrons of the plasma excite or do not excite the luminophore, depending on the potential applied to the grid which performs the function of a control electrode and storage element.
    Type: Grant
    Filed: May 19, 1977
    Date of Patent: October 31, 1978
    Assignee: Thomson-CSF
    Inventors: Raymond Poirier, Nicolas Szydlo