Patents by Inventor Nicole Adelle Saulnier

Nicole Adelle Saulnier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622250
    Abstract: Apparatus and methods for dielectric gap fill evaluations are provided. In one example, a method can comprise providing a gap fill substrate over one or more interlayer dielectric trenches of a dielectric layer and over a first material located in the one or more interlayer dielectric trenches. The method can also comprise depositing a gap fill candidate material within one or more gap fill substrate trenches of the gap fill substrate. Furthermore, the method can comprise etching the gap fill candidate material until a void within the first material is identified. Additionally, the method can comprise filling the one or more gap fill substrate trenches with a second material to form one or more contacts with the first material to measure a leakage current of one or more pitches.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: April 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve, Fee Li Lie, Nicole Adelle Saulnier, Indira Seshadri, Hosadurga Shobha
  • Publication number: 20190189504
    Abstract: Apparatus and methods for dielectric gap fill evaluations are provided. In one example, a method can comprise providing a gap fill substrate over one or more interlayer dielectric trenches of a dielectric layer and over a first material located in the one or more interlayer dielectric trenches. The method can also comprise depositing a gap fill candidate material within one or more gap fill substrate trenches of the gap fill substrate. Furthermore, the method can comprise etching the gap fill candidate material until a void within the first material is identified. Additionally, the method can comprise filling the one or more gap fill substrate trenches with a second material to form one or more contacts with the first material to measure a leakage current of one or more pitches.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve, Fee Li Lie, Nicole Adelle Saulnier, Indira Seshadri, Hosadurga Shobha
  • Publication number: 20190189503
    Abstract: Apparatus and methods for dielectric gap fill evaluations are provided. In one example, a method can comprise providing a gap fill substrate over one or more interlayer dielectric trenches of a dielectric layer and over a first material located in the one or more interlayer dielectric trenches. The method can also comprise depositing a gap fill candidate material within one or more gap fill substrate trenches of the gap fill substrate. Furthermore, the method can comprise etching the gap fill candidate material until a void within the first material is identified. Additionally, the method can comprise filling the one or more gap fill substrate trenches with a second material to form one or more contacts with the first material to measure a leakage current of one or more pitches.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve, Fee Li Lie, Nicole Adelle Saulnier, Indira Seshadri, Hosadurga Shobha
  • Patent number: 10312140
    Abstract: Apparatus and methods for dielectric gap fill evaluations are provided. In one example, a method can comprise providing a gap fill substrate over one or more interlayer dielectric trenches of a dielectric layer and over a first material located in the one or more interlayer dielectric trenches. The method can also comprise depositing a gap fill candidate material within one or more gap fill substrate trenches of the gap fill substrate. Furthermore, the method can comprise etching the gap fill candidate material until a void within the first material is identified. Additionally, the method can comprise filling the one or more gap fill substrate trenches with a second material to form one or more contacts with the first material to measure a leakage current of one or more pitches.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: June 4, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Isabel Cristina Chu, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Ekmini Anuja De Silva, Gauri Karve, Fee Li Lie, Nicole Adelle Saulnier, Indira Seshadri, Hosadurga Shobha
  • Publication number: 20180005937
    Abstract: A method of forming a self-aligned pattern of vias in a semiconductor device comprises etching a pattern of lines that contain notches that are narrower than other parts of the line. Thereafter, vias are created where the notches are located. The locations of the vias are such that the effect of blown-out areas is minimized. Thereafter, the lines are etched and the vias and line areas are filled. The layers are planarized such that the metal fill is level with a surrounding ultra-low-k dielectric. Additional metal layers, lines, and vias can be created. Other embodiments are also described herein.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Inventors: Benjamin David Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo, Nicole Adelle Saulnier