Abstract: In the present invention, an ADSL system (10) determines if a bit swap is to occur based upon a projected margin of a best carrier and a current margin of a worst carrier. If a proposed swap is not beneficial (320, 512, 604, 612) no swap occurs. In addition, the present invention determines the effects of a bit swap on an error correction scheme (510, 611). If the swap effects the scheme, adjustments to system parameters are made to assure continued error correction. In addition, the present invention allows for bit swapping to and from bins containing zero or two bits respectively (331, 332, 403).

Abstract: An instruction fetch and issuance unit (200) fetches two instruction words and issues at least one instruction word to an instruction decoder (250) per clock cycle. Two multiplexers (220, 230) receive the two fetched instructions and one or both of two of three words stored in an instruction register (240). A controller (210) selectively controls (207-209), in accordance with a state diagram (300), the loading of three words into the instruction register (240) from among the inputs of the multiplexers (220,230). The instruction register (240) issues up to two instructions per clock cycle without requiring the processor to stall to retrieve an additional word, allowing efficient issuance of a double-word instruction or two instructions in parallel.

Abstract: A digital cordless telephone (10) includes a handset (12) and a base station (14). A voice activity detector (20) in the handset (12) determines whether speech or silence is being received by a microphone (13) in the handset (12). An active enable signal is transmitted to the base station (14) when silence is being transmitted. An adaptive comfort noise generator (30) in the base station (14) then provides a comfort noise to a destination telephone instead of the silence. The output level of the comfort noise is a function of an energy level of a linear data signal received by the base station (14) before the enable signal becomes active.