Patents by Inventor Nien-Hung Lin

Nien-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924984
    Abstract: A display including a screen, a bracket, a hanging element and a fixing element is provided. The support is connected to the screen and has a top end and a bottom end. The hanging element is disposed on the top end. The fixing element is disposed at the bottom end. When the hanging element is hung on an upper edge of a plate, the fixing element is fixed on a surface of the plate.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: March 5, 2024
    Assignee: Qisda Corporation
    Inventors: Jen-Feng Chen, Yien-Bo Chen, Kuan-Hsu Lin, Hsin-Hung Lin, Nien-Tsung Hsu
  • Patent number: 11467773
    Abstract: A data accessing method, a memory control circuit unit, and a memory storage device are provided. The data accessing method includes the following steps. A reading command is received from a host system, in which the reading command instructs to read a first logical address, the first logical address is mapped to a first physical programming unit, and the first physical programming unit corresponds to a first physical erasing unit. A first data is generated after receiving the reading command, and the first data is written to a second physical programming unit included in the first physical erasing unit. A second data stored in the first physical programming unit is read after the first data is written, so as to respond to the reading command.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: October 11, 2022
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Nien-Hung Lin
  • Publication number: 20220229592
    Abstract: A data accessing method, a memory control circuit unit, and a memory storage device are provided. The data accessing method includes the following steps. A reading command is received from a host system, in which the reading command instructs to read a first logical address, the first logical address is mapped to a first physical programming unit, and the first physical programming unit corresponds to a first physical erasing unit. A first data is generated after receiving the reading command, and the first data is written to a second physical programming unit included in the first physical erasing unit. A second data stored in the first physical programming unit is read after the first data is written, so as to respond to the reading command.
    Type: Application
    Filed: February 17, 2021
    Publication date: July 21, 2022
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Nien-Hung Lin