Abstract: Expanded encoding may be implemented to enhance regular expression filter capabilities. Two or more adjacent characters in a stream of characters to be processed by a regular expression filter may be recognized and replaced with a symbol. The symbol may be used instead of the two or more adjacent characters for processing through non-deterministic finite automaton (NFA) states. The output of the NFA states may indicate whether a match for a regular expression is present in the stream of characters.

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to determine that a packet needs a timestamp, determine an initial timestamp for a reference block, communicate the reference block to a monitor engine, receive an asynchronous pulse from the monitor engine after the monitor engine received the reference block, determine a synchronization timestamp for the asynchronous pulse, and determine the timestamp for the packet based on the initial timestamp for the reference block and the synchronization timestamp for the asynchronous pulse.

Abstract: Integrated circuits may implement a filter to identify items in a data store that match a regular expression by sharing character data across lookups in the filter. The NFA states of the may be programmed responsive to a query that includes a regular expression. The NFA states may include a character decode stage that operates on one portion of character bits, while another portion of character bits is evaluated at a state detection stage that also evaluates an output value of the character decode stage.

Abstract: Techniques for multi-tenant storage for analytics with push down filtering are described. A multi-tenant storage service can include resources can be grouped into racks, with each rack providing a distinct endpoint to which client services may submit queries. Each rack may include interface nodes and storage nodes. The interface nodes can preprocess queries that are received by splitting them into chunks to be executed by the storage nodes. Each storage node includes a field programmable gate array (FPGA) and a CPU. The CPU can receive the operations and convert the operations into instructions that can be executed by the FPGA. The instructions may include pointers to data and operations for the FPGA to perform on the data. The FPGA can process the data stream and return the results of the processing which are returned via the interface node.

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to determine that a packet needs a timestamp, determine an initial timestamp for a reference block, communicate the reference block to a monitor engine, receive an asynchronous pulse from the monitor engine after the monitor engine received the reference block, determine a synchronization timestamp for the asynchronous pulse, and determine the timestamp for the packet based on the initial timestamp for the reference block and the synchronization timestamp for the asynchronous pulse.