Patents by Inventor Nigel Horspool
Nigel Horspool has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11966295Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.Type: GrantFiled: May 27, 2022Date of Patent: April 23, 2024Assignee: KIOXIA CORPORATIONInventors: Nigel Horspool, Steve Wells
-
Patent number: 11966605Abstract: Various implementations described herein relate to systems and methods for managing superblocks, including a non-volatile storage including a superblock and a controller configured to notify a host of a size of the superblock to a host, determine a stream that aligns with the superblock, write data corresponding to the stream to the superblock, and determine that writing the data correspond to the stream has completed.Type: GrantFiled: March 9, 2022Date of Patent: April 23, 2024Assignee: KIOXIA CORPORATIONInventors: Steven Wells, Neil Buxton, Nigel Horspool, Mohinder Saluja, Paul Suhler
-
Publication number: 20230333774Abstract: A solid-state drive having an integrated circuit comprising a controller that is configured to determine, for data transferred between a host interface of the integrated circuit and nonvolatile semiconductor storage device interface of the integrated circuit, the availability of an internal buffer of the integrated circuit to transparently accumulate the transferred data, and (i) if the internal buffer is available, accumulate the data from target nonvolatile semiconductor storage devices or the host in the internal buffer, or (ii) if the internal buffer is not available, accumulate the data unit from the target nonvolatile semiconductor storage devices or the host in an external buffer communicatively coupled to the controller, wherein the external buffer is external to the integrated circuit. The controller then provides the accumulated data to the respective interfaces to furnish a read or write request from the host.Type: ApplicationFiled: June 28, 2023Publication date: October 19, 2023Inventors: Nigel Horspool, Julien Margetts
-
Publication number: 20230305745Abstract: Various implementations described herein relate to systems, methods, and non-transitory computer-readable media for managing write commands to superblocks, including receiving, by a storage device from a host, a write command and a write data. The write command indicates that the write data is to be written to a first superblock of the storage device. The storage device determines the first superblock lacks sufficient capacity to store the write data. In response to determining that the first superblock lacks the sufficient capacity to store the write data, the storage device programs the write data to at least one of a reserved capacity of the first superblock or a second superblock.Type: ApplicationFiled: March 22, 2022Publication date: September 28, 2023Applicant: Kioxia CorporationInventors: Nigel Horspool, Steve Wells, Neil Buxton
-
Publication number: 20230289078Abstract: Various implementations described herein relate to systems and methods for managing superblocks, including a non-volatile storage including a superblock and a controller configured to notify a host of a size of the superblock to a host, determine a stream that aligns with the superblock, write data corresponding to the stream to the superblock, and determine that writing the data correspond to the stream has completed.Type: ApplicationFiled: March 9, 2022Publication date: September 14, 2023Inventors: Steven Wells, Neil Buxton, Nigel Horspool, Mohinder Saluja, Paul Suhler
-
Patent number: 11726704Abstract: A solid-state drive having an integrated circuit comprising a controller that is configured to determine, for data transferred between a host interface of the integrated circuit and nonvolatile semiconductor storage device interface of the integrated circuit, the availability of an internal buffer of the integrated circuit to transparently accumulate the transferred data, and (i) if the internal buffer is available, accumulate the data from target nonvolatile semiconductor storage devices or the host in the internal buffer, or (ii) if the internal buffer is not available, accumulate the data unit from the target nonvolatile semiconductor storage devices or the host in an external buffer communicatively coupled to the controller, wherein the external buffer is external to the integrated circuit. The controller then provides the accumulated data to the respective interfaces to furnish a read or write request from the host.Type: GrantFiled: March 31, 2020Date of Patent: August 15, 2023Assignee: Kioxia CorporationInventors: Nigel Horspool, Julien Margetts
-
Patent number: 11698753Abstract: A method performed by a controller of an SSD, the controller coupled to a non-volatile semiconductor memory device and comprising a first command queue (Q1) and a second command queue (Q2). The method comprises selecting from a submission queue at least one command from a host, the command relating to an action to be performed on the memory device. The method comprises determining if a number of in-flight commands received from the host via the submission queue and already present in Q1 exceeds a threshold. The method comprises adding the selected command to Q2 if the threshold is exceeded, otherwise adding the selected command to Q1. The method comprises processing a first command from Q1 and a second command from Q2 to perform a first action and a second action, respectively, on the memory device, the first action being completed in advance of the second action.Type: GrantFiled: February 17, 2021Date of Patent: July 11, 2023Assignee: Kioxia CorporationInventors: Nigel Horspool, Brian Clarke
-
Patent number: 11586734Abstract: Various implementations described herein relate to systems and methods for protecting data stored on a Solid State Drive (SSD) against malware, including determining, by a controller of the SSD, a typical traffic profile, receiving, by the controller, commands from a host, and determining, by the controller, that the commands are likely caused by malware by determining that the commands deviate from the typical traffic profile. In response to determining the commands are likely caused by the malware, the controller performs a malware response action.Type: GrantFiled: February 28, 2020Date of Patent: February 21, 2023Assignee: KIOXIA CORPORATIONInventors: Nigel Horspool, Gary James Calder
-
Publication number: 20220291997Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.Type: ApplicationFiled: May 27, 2022Publication date: September 15, 2022Applicant: Kioxia CorporationInventors: Nigel HORSPOOL, Steve WELLS
-
Publication number: 20220261183Abstract: A method performed by a controller of an SSD, the controller coupled to a non-volatile semiconductor memory device and comprising a first command queue (Q1) and a second command queue (Q2). The method comprises selecting from a submission queue at least one command from a host, the command relating to an action to be performed on the memory device. The method comprises determining if a number of in-flight commands received from the host via the submission queue and already present in Q1 exceeds a threshold. The method comprises adding the selected command to Q2 if the threshold is exceeded, otherwise adding the selected command to Q1. The method comprises processing a first command from Q1 and a second command from Q2 to perform a first action and a second action, respectively, on the memory device, the first action being completed in advance of the second action.Type: ApplicationFiled: February 17, 2021Publication date: August 18, 2022Inventors: Nigel Horspool, Brian Clarke
-
Patent number: 11347593Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.Type: GrantFiled: September 28, 2020Date of Patent: May 31, 2022Assignee: KIOXIA CORPORATIONInventors: Nigel Horspool, Steve Wells
-
Publication number: 20210303199Abstract: A solid-state drive having an integrated circuit comprising a controller that is configured to determine, for data transferred between a host interface of the integrated circuit and nonvolatile semiconductor storage device interface of the integrated circuit, the availability of an internal buffer of the integrated circuit to transparently accumulate the transferred data, and (i) if the internal buffer is available, accumulate the data from target nonvolatile semiconductor storage devices or the host in the internal buffer, or (ii) if the internal buffer is not available, accumulate the data unit from the target nonvolatile semiconductor storage devices or the host in an external buffer communicatively coupled to the controller, wherein the external buffer is external to the integrated circuit. The controller then provides the accumulated data to the respective interfaces to furnish a read or write request from the host.Type: ApplicationFiled: March 31, 2020Publication date: September 30, 2021Inventors: Nigel Horspool, Julien Margetts
-
Publication number: 20210271757Abstract: Various implementations described herein relate to systems and methods for protecting data stored on a Solid State Drive (SSD) against malware, including determining, by a controller of the SSD, a typical traffic profile, receiving, by the controller, commands from a host, and determining, by the controller, that the commands are likely caused by malware by determining that the commands deviate from the typical traffic profile. In response to determining the commands are likely caused by the malware, the controller performs a malware response action.Type: ApplicationFiled: February 28, 2020Publication date: September 2, 2021Applicant: Kioxia CorporationInventors: Nigel Horspool, Gary James Calder
-
Publication number: 20210011809Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.Type: ApplicationFiled: September 28, 2020Publication date: January 14, 2021Applicant: Toshiba Memory CorporationInventors: Nigel HORSPOOL, Steve WELLS
-
Patent number: 10789130Abstract: Various implementations described herein relate to systems and methods for a Solid State Drive (SSD) to manage data in response to a power loss event, including writing data received from a host to a volatile storage of the SSD, detecting the power loss event before the data is written to a non-volatile storage of the SSD, storing the write commands to a non-volatile storage of the SSD, marking at least one storage location of the SSD associated with the write commands as uncorrectable, for example, after the power is restored.Type: GrantFiled: March 9, 2018Date of Patent: September 29, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Nigel Horspool, Steve Wells
-
Patent number: 6594283Abstract: A network communications device is arranged to have a fast throughput of data packets. This is achieved by recognising that, in protocols such as Ethernet, the first symbols in a data packet do not carry any data and therefore do not necessarily require to be properly carried through a communications hub. Rather, a known number of symbols are discarded from the start of a packet on receipt and replaced on re-transmission. This discarding reduces the reception delays particularly in bussed-architecture repeaters where bus arbitration must take place for each received packet.Type: GrantFiled: November 30, 1998Date of Patent: July 15, 2003Assignee: 3Com CorporationInventors: Nigel Horspool, David Law, Quang Tran, Patrick Overs
-
Patent number: 6538994Abstract: A data connection between two network stations such as an Ethernet hub and an end station which are both capable of exchanging data at the higher of two rates, the higher rate being selected by an auto-negotiation process, is monitored for the occurrence of error represented by a symbol representing the start of a data packet immediately followed by an idle symbol. The rate of occurrence of such errors is compared against a threshold and the speed of the data connection is downgraded to the lower rate.Type: GrantFiled: April 6, 1999Date of Patent: March 25, 2003Assignee: 3Com TechnologiesInventors: Nigel Horspool, Paul J. Moran, David J. Law, Paul Cramphorn
-
Patent number: 6430192Abstract: A method of operating a repeater for a packet-based data transmission system wherein the repeater has a receiving port associated with a buffer whereby packets received at the port are temporarily stored before they are onwardly transmitted and wherein the repeater performs a contention resolution process such that if an attempted onward transmission of a packet is prevented by virtue of contention with a prior or an existing transmission, a subsequent attempt at transmission of that packet is delayed for a time which is likely to be substantially greater than a selected minimum time. The method includes examining a received packet to determine whether the packet is a multi-media packet, and giving the packet a higher priority in the contention resolution process such that if the packet is not transmitted onwardly owing to contention with a prior transmission, a fresh attempt at transmission of the packet is made on the expiry of the selected minimum time.Type: GrantFiled: January 14, 1999Date of Patent: August 6, 2002Assignee: 3COM TechnologiesInventors: Tadhg Creedon, David J. Law, Terence D. Lockyer, Nigel Horspool
-
Patent number: 6256318Abstract: The occurrence of collision and activity in a computer network is indicated by activation of a visual indication device. The device is activated for periods which are longer than the actual periods of collision and activity to permit the human eye to register the visual indications. This is particularly useful for high speed networks where the periods of collision and activity may be very brief.Type: GrantFiled: August 26, 1998Date of Patent: July 3, 2001Assignee: 3Com CorporationInventors: Pauric O'Callaghan, Nigel Horspool, David Law, Justin Drummond-Murray, Nicholas Stapleton