Abstract: A current switching circuit (10) receives an input signal having one of an upper and a lower signal level. First (60) and second (70) transistors switch an output (115) between the upper and the lower signal level in response to the input signal. A first high resistance path (80) is selectively coupled via a gate (75) between the first transistor (60) and a first potential. A second high resistance path (90) is selectively coupled via a gate (85) between the second transistor (70) and a second potential. A control input (20) causes a logic arrangement (22) to control the gates (75, 85) thereby selectively coupling the high resistance paths (80, 90) to the first (60) and second (70) transistors such that they can switch the output at a first and a second switching speed.