Patents by Inventor Nikhil A. Mehta

Nikhil A. Mehta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240049450
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate. A first capacitor includes a first top plate and a first bottom plate above the substrate. The first top plate is coupled to a first metal electrode within an inter-level dielectric (ILD) layer to access the first capacitor. A second capacitor includes a second top plate and a second bottom plate, where the second top plate is coupled to a second metal electrode within the ILD layer to access the second capacitor. The second metal electrode is disjoint from the first metal electrode. The first capacitor is accessed through the first metal electrode without accessing the second capacitor through the second metal electrode. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Jared STOEGER, Yu-Wen HUANG, Shu ZHOU
  • Patent number: 11868728
    Abstract: Techniques for providing and implementing a single skill associated with custom functionality and system-provided functionality are described. The skill may be used to invoke functionality in response to a user input without requiring a user remember exact formulations to cause the functionality to be performed. The skill may be associated with more than one domain. For example, the skill may be associated with custom sample user inputs (corresponding to the custom functionality) that correspond to a custom domain while the skill may also be associated with system-provided sample user inputs (corresponding to the system-provided functionality) associated with a non-custom domain.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: January 9, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Jeffery Alan Meissner, Ernesto Gonzalez, Nikhil Mehta, Anemona Oana Hagea, John Montague Howard
  • Patent number: 11832438
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate. A first capacitor includes a first top plate and a first bottom plate above the substrate. The first top plate is coupled to a first metal electrode within an inter-level dielectric (ILD) layer to access the first capacitor. A second capacitor includes a second top plate and a second bottom plate, where the second top plate is coupled to a second metal electrode within the ILD layer to access the second capacitor. The second metal electrode is disjoint from the first metal electrode. The first capacitor is accessed through the first metal electrode without accessing the second capacitor through the second metal electrode. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Jared Stoeger, Yu-Wen Huang, Shu Zhou
  • Patent number: 11750660
    Abstract: Examples for detecting a compromised device are described. A set of threat detection rules can instruct an application on the client device how to detect whether the client device is compromised. The rules can be updated dynamically and without updating the application that is performing the compromise detection. The rules can be encoded in an interpreted scripting language and executed by a runtime environment that is embedded within the application.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: September 5, 2023
    Assignee: VMware, INC.
    Inventors: Simon Brooks, Daniel E. Zeck, Xinpi Du, Ali Mohsin, Kishore Sajja, Nikhil Mehta
  • Patent number: 11740561
    Abstract: A lithographic apparatus includes an illumination system to produce a beam of radiation, a support to support a patterning device to impart a pattern on the beam, a projection system to project the patterned beam onto a substrate, and a metrology system that includes a radiation source to generate radiation, an optical element to direct the radiation toward a target, a detector to receive a first and second radiation scattered by the target and produce a first and second measurement respectively based on the received first and second radiation, and a controller. The controller determines a correction for the first measurement, an error between the correction for the first measurement and the first measurement, and a correction for the second measurement based on the correction for the first measurement, the second measurement, and the error. The lithographic apparatus uses the correction to adjust a position of a substrate.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: August 29, 2023
    Assignee: ASML Netherlands B.V
    Inventors: Nikhil Mehta, Piotr Jan Meyer
  • Publication number: 20230200043
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Julie ROLLINS, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Yu-Wen HUANG, Shu ZHOU
  • Patent number: 11652047
    Abstract: Embodiments herein describe techniques for a semiconductor device having an interconnect structure including an inter-level dielectric (ILD) layer between a first layer and a second layer of the interconnect structure. The interconnect structure further includes a separation layer within the ILD layer. The ILD layer includes a first area with a first height to extend from a first surface of the ILD layer to a second surface of the ILD layer. The ILD layer further includes a second area with a second height to extend from the first surface of the ILD layer to a surface of the separation layer, where the first height is larger than the second height. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Ting Chen, Vinaykumar V. Hadagali
  • Patent number: 11610894
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. A first capacitor and a second capacitor are formed within the first ILD layer and the second ILD layer. A first top plate of the first capacitor and a second top plate of the second capacitor are formed at a boundary between the first ILD layer and the second ILD layer. The first capacitor and the second capacitor are separated by a dielectric area in the first ILD layer. The dielectric area includes a first dielectric area that is coplanar with the first top plate or the second top plate, and a second dielectric area above the first dielectric area and to separate the first top plate and the second top plate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 21, 2023
    Assignee: Intel Corporation
    Inventors: Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang, Jack T. Kavalieros, Bernhard Sell, Tahir Ghani, Gregory George, Akash Garg, Julie Rollins, Allen B. Gardiner, Shem Ogadhoh, Juan G. Alzate Vinasco, Umut Arslan, Fatih Hamzaoglu, Nikhil Mehta, Yu-Wen Huang, Shu Zhou
  • Patent number: 11566298
    Abstract: Methods and masks for manufacturing component of gas turbine engines are described. The methods include applying a mask to a protected surface of the component, the component having a designated surface to be treated by a shot peen operation. The mask includes a full masking portion configured to prevent a shot peen media from impacting the protected surface. A masking control region is arranged around the designated surface. The masking control region is configured to control an amount of force imparted to the component by shot peen media during the shot peen operation, wherein the masking control region extends from the full masking portion to the designated surface. The designated surface is shot peened with shot peen media to form a compressive stress region within the component proximate the designated surface and a tapering transition of compressive forces within the component proximate the masking control region.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: January 31, 2023
    Assignee: RAYTHEON TECHNOLOGIES CORPORATION
    Inventors: Derek T. Welch, Nikhil Mehta
  • Patent number: 11563107
    Abstract: An integrated circuit structure comprises one or more backend-of-line (BEOL) interconnects formed over a first ILD layer. An etch stop layer is over the one or more BEOL interconnects, the etch stop layer having a plurality of vias that are in contact with the one or more BEOL interconnects. An array of BEOL thin-film-transistors (TFTs) is over the etch stop layer, wherein adjacent ones of the BEOL TFTs are separated by isolation trench regions. The TFTs are aligned with at least one of the plurality of vias to connect to the one or more BEOL interconnects, wherein each of the BEOL TFTs comprise a bottom gate electrode, a gate dielectric layer over the bottom gate electrode, and an oxide-based semiconductor channel layer over the bottom gate electrode having source and drain regions therein. Contacts are formed over the source and drain regions of each of BEOL TFTs, wherein the contacts have a critical dimension of 35 nm or less, and wherein the BEOL TFTs have an absence of diluted hydro-fluoride (DHF).
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: January 24, 2023
    Assignee: Intel Corporation
    Inventors: Chieh-Jen Ku, Bernhard Sell, Pei-Hua Wang, Nikhil Mehta, Shu Zhou, Jared Stoeger, Allen B. Gardiner, Akash Garg, Shem Ogadhoh, Vinaykumar Hadagali, Travis W. Lajoie
  • Publication number: 20220416044
    Abstract: Gate-all-around integrated circuit structures having nanoribbon sub-fin isolation by backside Si substrate removal etch selective to source and drain epitaxy, are described. For example, an integrated circuit structure includes a plurality of horizontal nanowires above a sub-fin. A gate stack is over the plurality of nanowires and the sub-fin. Epitaxial source or drain structures are on opposite ends of the plurality of horizontal nanowires. The epitaxial growth occurs inside a mold confinement, and due the mold, the lateral wingspan of the wingspan of the epitaxial growth is limited. Also the mold causes the epitaxial source or drain structures to exhibit substantially vertical opposing sidewalls and a top surface having a generally mushroom shape over a top of a dielectric layer.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: Nitesh KUMAR, Mohammed HASAN, Vivek THIRTHA, Nikhil MEHTA, Tahir GHANI
  • Publication number: 20220385529
    Abstract: Systems and methods are provided for dynamic selection of anomaly detection options for particular metric data. Metric data corresponding to one or more configuration items of an information technology (IT) infrastructure is collected. A selected anomaly detection action option that applies to the metric data is identified. An action is performed using the metric data, based upon the selected anomaly detection action option. A dashboard graphical user interface (GUI) display results of the action.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Kanwaldeep K. Dang, Anand Nikhil Mehta, Kiran Kumar Bushireddy, Swapnesh Patel, Bnayahu Makovsky
  • Patent number: 11500874
    Abstract: The present approach relates generally to systems and methods for outputting metric data from resources with a database accessible by a client instance. The client instance is hosted by one or more data centers and accessible by one or more remote client networks. In accordance with the present approach, a request to track metric data related to a resource is received. Further, a configuration item (CI) is retrieved from a database accessible by the client instance based at least in part on data associated with the request. Further, a type of CI is identified. Even further, a resource type associated with the type of the CI is identified based at least in part on a resource abstraction layer accessible by the client instance. Further still, the resource type is linked to the resource table and metric data associated with the resource is outputted.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 15, 2022
    Assignee: ServiceNow, Inc.
    Inventors: Ritika Goyal, Szu-hsuan Lee, Vincent Seguin, Kanwaldeep Kaur Dang, Anand Nikhil Mehta
  • Publication number: 20220350260
    Abstract: Disclosed is a method for a metrology measurement on an area of a substrate comprising at least a portion of a target structure. The method comprises receiving a radiation information representing a portion of radiation scattered by the are, and using a filter in a Fourier domain for removing or suppressing at least a portion of the received radiation information that does not relate to radiation that has been scattered by the target structure for obtaining a filtered radiation information for the metrology measurement, wherein characteristics of the filter are based on target information about the target structure.
    Type: Application
    Filed: September 3, 2020
    Publication date: November 3, 2022
    Applicants: ASML Holding N.V., ASML Netherlands B.V.
    Inventors: Armand Eugene Albert, Justin Lloyd KREUZER, Nikhil MEHTA, Patrick WARNAAR, Vasco Tomas TENNER, Patricius Aloysius Jacobus TINNEMANS, Hugo Augustinus Joseph CRAMER
  • Publication number: 20220260929
    Abstract: A patterning device for patterning product structures onto a substrate and an associated substrate patterned using such a patterning device. The patterning device includes target patterning elements for patterning at least one target from which a parameter of interest can be inferred. The patterning device includes product patterning elements for patterning the product structures. The target patterning elements and product patterning elements are configured such that the at least one target has at least one boundary which is neither parallel nor perpendicular with respect to the product structures on the substrate.
    Type: Application
    Filed: July 6, 2020
    Publication date: August 18, 2022
    Applicants: ASML NETHERLANDS B.V., ASML HOLDING N.V.
    Inventors: Nikhil MEHTA, Maurits VAN DER SCHAAR, Markus Gerardus Martinus Maria VAN KRAAIJ, Hugo Augustinus Joseph CRAMER, Olger Victor ZWIER, Jeroen COTTAAR, Patrick WARNAAR
  • Patent number: 11410061
    Abstract: Systems and methods are provided for dynamic selection of anomaly detection options for particular metric data. Metric data corresponding to one or more configuration items of an information technology (IT) infrastructure is collected. A selected anomaly detection action option that applies to the metric data is identified. An action is performed using the metric data, based upon the selected anomaly detection action option. A dashboard graphical user interface (GUI) display results of the action.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: August 9, 2022
    Assignee: ServiceNow, Inc.
    Inventors: Kanwaldeep K. Dang, Anand Nikhil Mehta, Kiran Kumar Bushireddy, Swapnesh Patel, Bnayahu Makovsky
  • Publication number: 20220197151
    Abstract: A lithographic apparatus includes an illumination system to produce a beam of radiation, a support to support a patterning device to impart a pattern on the beam, a projection system to project the patterned beam onto a substrate, and a metrology system that includes a radiation source to generate radiation, an optical element to direct the radiation toward a target, a detector to receive a first and second radiation scattered by the target and produce a first and second measurement respectively based on the received first and second radiation, and a controller. The controller determines a correction for the first measurement, an error between the correction for the first measurement and the first measurement, and a correction for the second measurement based on the correction for the first measurement, the second measurement, and the error. The lithographic apparatus uses the correction to adjust a position of a substrate.
    Type: Application
    Filed: January 28, 2020
    Publication date: June 23, 2022
    Applicant: ASML Netherlands B.V.
    Inventors: Nikhil MEHTA, Piotr Jan MEYER
  • Patent number: 11361762
    Abstract: A method may include obtaining a dialogue of a user and a pre-trained language model. The method may include obtaining a corpus of dialogues and a corpus of response materials. The method may include modifying the pre-trained language model. The method may include identifying a dialogue topic of the dialogue of the user and identifying a set of response topics. The method may include selecting a set of response materials from the corpus of response materials. The method may include determining a first plurality of probabilities and, for each response material of the set of response materials, a respective second plurality of probabilities. The method may include comparing the first plurality of words with each respective second plurality of words associated with each respective response material of the set of response materials. The method may include selecting a response material of the set of response materials based on the comparison.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: June 14, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Nikhil Mehta, Ramya Malur Srinivasan, Ajay Chander
  • Publication number: 20210409452
    Abstract: Examples for detecting a compromised device are described. A set of threat detection rules can instruct an application on the client device how to detect whether the client device is compromised. The rules can be updated dynamically and without updating the application that is performing the compromise detection. The rules can be encoded in an interpreted scripting language and executed by a runtime environment that is embedded within the application.
    Type: Application
    Filed: September 9, 2021
    Publication date: December 30, 2021
    Inventors: Simon Brooks, Daniel E. Zeck, Xinpi Du, Ali Mohsin, Kishore Sajja, Nikhil Mehta
  • Publication number: 20210374608
    Abstract: A federated machine-learning system includes a global server and client devices. The server receives updates of weight factor dictionaries and factor strengths vectors from the clients, and generates a globally updated weight factor dictionary and a globally updated factor strengths vector. A client device selects a group of parameters from a global group of parameters, and trains a model using a dataset of the client device and the group of selected parameters. The client device sends to the server a client-updated weight factor dictionary and a client-updated factor strengths vector. The client device receives the globally updated weight factor dictionary and the globally updated factor strengths vector, and retrains the model using the dataset of the client device, the group of parameters selected by the client device, and the globally updated weight factor dictionary and the globally updated factor strengths vector.
    Type: Application
    Filed: January 13, 2021
    Publication date: December 2, 2021
    Inventors: Mostafa EL-KHAMY, Jungwon LEE, Weituo HAO, Lawrence CARIN, Nikhil MEHTA, Kevin J. LIANG