Abstract: A post singulation, die separation assembly for bulk separation of a plurality of dice in a singulated wafer from the adhesive backing of wafer saw tape. The die separation assembly includes a support base having a support surface. A feed tray includes a collection end positioned adjacent the base such that an elongated, substantially tin gap is formed between the tray collection end and at least a portion of the base. A flexible platform is movably supported atop the base support surface for movement along the base. Upon movement of the flexible platform down the down-ramped portion of the support base, a portion of the wafer saw tape thereat is peeled away from the respective die. The tape is the separated from the dice, releasing the respective dice onto the collection end of the feed tray in a manner substantially maintaining their forward alignment orientation of thereof.

Abstract: A post singulation, die separation assembly for bulk separation of a plurality of dice in a singulated wafer from the adhesive backing of wafer saw tape. The die separation assembly includes a support base having a support surface, a first portion and an opposite second portion thereof. The second portion includes a down-ramped portion thereof skewed downwardly at a first acute angle from the support surface. A feed tray includes a collection end positioned adjacent the base second portion such that an elongated, substantially thin gap is formed between the tray collection end and at least a portion of the base second portion. A flexible platform is movably supported atop the base support surface for movement from the first portion to the second portion thereof. At the second portion, the platform passes downward through the gap formed between the tray collection end and the at least a portion of the base second portion.

Abstract: Semiconductor device packages having top and bottom interconnecting surfaces that can be connected to external electrical systems are described. These packages include internal contact leads that are bent such that they extend from a top surface to a bottom surface of the package and thereby form the corresponding interconnecting surfaces. In some embodiments, a solder ball is formed on either the top or bottom portion of the contact leads so that the solder balls form one of the contact surfaces of the package.

Abstract: A variety of improved shell case style packages as well as shell case style wafer level packaging processes are described. Generally, in shell case style packaging, traces are patterned on the top surface of a wafer. In some embodiments, the conductors formed along the sides of the package are formed from at least a couple conductor layers to improve the adhesion of the conductors to the traces formed on the top surface of the devices. In some embodiments the conductors are patterned during processing such that the conductors are not cut during the wafer dicing operation. This arrangement is particularly useful when the conductors are formed at least partially from aluminum (or other metals that oxidize in ambient air). In other embodiments, BCB is not used under the trace layer in regions that will have notches formed therein so that the resulting package does not have any exposed BCB/trace junctions. In some embodiments, no BCB layer whatsoever is applied during packaging.

Abstract: A variety of improved shell case style packages as well as shell case style wafer level packaging processes are described. Generally, in shell case style packaging, traces are patterned on the top surface of a wafer. In some embodiments, the conductors formed along the sides of the package are formed from at least a couple conductor layers to improve the adhesion of the conductors to the traces formed on the top surface of the devices. In some embodiments the conductors are patterned during processing such that the conductors are not cut during the wafer dicing operation. This arrangement is particularly useful when the conductors are formed at least partially from aluminum (or other metals that oxidize in ambient air). In other embodiments, BCB is not used under the trace layer in regions that will have notches formed therein so that the resulting package does not have any exposed BCB/trace junctions. In some embodiments, no BCB layer whatsoever is applied during packaging.

Abstract: Flip chips with improved solder bump strength are provided. A solder mask layer is placed and patterned on a front side of a wafer of semiconductor chips with semiconductor devices and bond pads. The solder mask is patterned to expose the bond pads. Solder bumps are electrically connected to the bond pads. The solder mask is thick enough to extend up to at least a quarter of the solder bumps and is in contact with the solder bumps. The wafer is then cut into individual chips. The chips may be sold to customers, who may mount the chip on a substrate without underfill.

Abstract: Flip chips with improved solder bump strength are provided. A solder mask layer is placed and patterned on a front side of a wafer of semiconductor chips with semiconductor devices and bond pads. The solder mask is patterned to expose the bond pads. Solder bumps are electrically connected to the bond pads. The solder mask is thick enough to extend up to at least a quarter of the solder bumps and is in contact with the solder bumps. The wafer is then cut into individual chips. The chips may be sold to customers, who may mount the chip on a substrate without underfill.

Abstract: A method and apparatus for forming a layer of underfill adhesive on an integrated circuit located on a wafer surface are described. As a flip chip, the integrated circuit has electrically conductive pads, most of which have a solder ball attached thereto. A layer of underfill adhesive is then formed on the wafer surface such that at least some portion of most of the solder balls remain uncovered. The layer of underfill adhesive is partially cured and the flip chip is then mounted onto a substrate. A solder reflow operation electrically couples the flip chip and the substrate as well as fully cures the underfill adhesive.

Abstract: A method and an apparatus for forming a plastic chip on chip module is disclosed. The plastic chip on chip module is formed by placing a stacked chip set into a molding chamber suitably arranged to receive encapsulant. The stacked chip set includes a daughter chip that is electrically and mechanically coupled to a mother chip where the daughter chip is directly aligned to and separated from the mother chip by a standoff gap. Encapsulant is then passed into the molding chamber filling the standoff gap substantially simultaneously with surrounding the chip set to form the plastic chip on chip module.

Abstract: A method of forming an interconnection contact for integrated circuit package components includes providing an integrated circuit package component having a contact pad on which the interconnecting contact is to be formed. The interconnecting contact is formed by forming at least a portion of a bonding wire loop connected to the contact pad. A first end of a bonding wire is connected to the contact pad. The bonding wire loop includes a wire portion extending outwardly from the contact pad. The portion of the bonding wire loop forms the interconnection contact for electrically connecting the integrated circuit package component to other electrical devices. In one embodiment, a second end of the bonding wire loop is connected to the same contact pad that the first end of the bonding wire loop is connected to. In another embodiment, a second end of the bonding wire loop is connected to another contact pad.