Abstract: Embodiments herein provide a data storage device including a non-volatile memory, a second memory, and a controller coupled to the non-volatile memory and the second memory. The second memory is configured to store a plurality of delta queues. Each of the plurality of delta queues includes delta queue entries. The delta queue entries are grouped into one or more logical-to-physical (L2P) pages. Each of the one or more L2P pages is associated with a plurality of logical flash management units (LFMUs) corresponding to a plurality of physical addresses in the non-volatile memory. The controller is configured to determine that a delta queue flush is required. In response to determining that the delta queue flush is required, the controller selects one of the plurality of delta queues to flush, and flushes the one or more L2P pages stored in the one of the plurality of delta queues to the non-volatile memory.

Abstract: Bit-flip object insertion techniques are provided for use with a non-volatile memory (NVM) wherein an object is inserted into a background image by flipping or inverting one or more bits within the pixels of the background image that correspond to the shape and insertion location of an object being inserted. In an illustrative example, pixels within the background image that correspond to the shape and insertion location of the object are XORed with binary 1s. This flips the bits of those pixels to change the color (hue) and/or intensity (brightness) of the pixels so the object appears in the background image. In other examples, only the most significant bits of pixels in the background image are inverted (flipped). Exemplary latch-based procedures are described herein for high-speed processing on an NVM die. Multiple plane NVM die implementations are also described for massive processing.

Abstract: Embodiments herein provide a data storage device including a non-volatile memory, a second memory, and a controller coupled to the non-volatile memory and the second memory. The second memory is configured to store a plurality of delta queues. Each of the plurality of delta queues includes delta queue entries. The delta queue entries are grouped into one or more logical-to-physical (L2P) pages. Each of the one or more L2P pages is associated with a plurality of logical flash management units (LFMUs) corresponding to a plurality of physical addresses in the non-volatile memory. The controller is configured to determine that a delta queue flush is required. In response to determining that the delta queue flush is required, the controller selects one of the plurality of delta queues to flush, and flushes the one or more L2P pages stored in the one of the plurality of delta queues to the non-volatile memory.

Abstract: Various devices, such as storage devices or systems are configured to efficiently process and update logical maps within control table sets. Control table sets are often groupings of logical map corresponding to the logical locations of data requested by a host-computing device and the physical locations of the data within the memory array. As data is written and erased, these maps must be updated within the control table set. Received changes to these maps are typically stored and updated in two locations: a cache memory and a control table update list. By tracking and marking various control table sets as dirty or having undergone multiple changes, additional received updates can be stored and updated in only the cache memory, bypassing the second control table change list. By only utilizing one method of updating control table sets, processing overhead is reduced and various read or write activities are more efficiently done.

Abstract: Bit-flip object insertion techniques are provided for use with a non-volatile memory (NVM) wherein an object is inserted into a background image by flipping or inverting one or more bits within the pixels of the background image that correspond to the shape and insertion location of an object being inserted. In an illustrative example, pixels within the background image that correspond to the shape and insertion location of the object are XORed with binary 1s. This flips the bits of those pixels to change the color (hue) and/or intensity (brightness) of the pixels so the object appears in the background image. In other examples, only the most significant bits of pixels in the background image are inverted (flipped). Exemplary latch-based procedures are described herein for high-speed processing on an NVM die. Multiple plane NVM die implementations are also described for massive processing.