Patents by Inventor Nikolaos MAKRIYANNIS

Nikolaos MAKRIYANNIS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEM AND METHOD FOR PROCESSING BOOLEAN AND GARBLED CIRCUITS IN MEMORY-LIMITED ENVIRONMENTS
    Publication number: 20220172647
    Abstract: A system and method for processing garbled circuit techniques in memory-limited environments. The method includes: initializing a plurality of input gates and a plurality of state gates; generating a circuit slice for an update function; setting the plurality of state gates as a plurality of new output-state-gates; and generating a circuit slice for a finalization function, wherein the finalization function represented by a sub-circuit, the outputs of which are terminal gates.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 2, 2022
    Applicant: Fireblocks Ltd.
    Inventors: Udi PELED, Nikolaos MAKRIYANNIS, Idan OFRAT, Pavel BERENGOLTZ