Patents by Inventor Nikolas Hall

Nikolas Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260096255
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with metallic dimming layers and related methods are disclosed. Metallic dimming layers are formed over top surfaces and mesa sidewalls in LED chips to absorb and/or reflect light generated by the LED chips. Resulting LED chips have light outputs that may be reduced in a controlled manner to target various lighting applications where specific brightness levels are targeted. Metallic dimming layers are disclosed that extend past mesa sidewalls without extending all the way to perimeter edges of LED chips. Metallic dimming layers may be embedded within passivation layers for electrical isolation, particularly at the perimeter edges. Related methods are disclosed where LED chips with metallic dimming layers are fabricated with as few as three photolithography steps.
    Type: Application
    Filed: September 12, 2025
    Publication date: April 2, 2026
    Inventors: Steven Wuester, Michael Check, Nikolas Hall
  • Patent number: 12557443
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures in LED chips for reducing voiding of bonding metals are disclosed. LED chips include active LED structures on carrier submounts and contact structures arranged to receive external electrical connections adjacent the active LED structures. Exemplary contact structures include contacts electrically coupled to active LED structures and dielectric structures beneath the contacts. Dielectric structures are arranged beneath portions of the contacts while still allowing electrical connections therethrough. Such dielectric structures may be provided as regions of dielectric material with spacings that control topography of underlying bonding metals to reduce voiding.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: February 17, 2026
    Assignee: CreeLED, Inc.
    Inventors: Michael Check, Justin White, Steven Wuester, Nikolas Hall, Kevin Haberern, Colin Blakely, Jesse Reiherzer
  • Publication number: 20260033048
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly reflective structures for LED chips and related methods are disclosed. Reflective structures include arrangements of a first metal and a second metal within a metal reflective layer. The second metal may have a nonuniform distribution throughout a thickness of the metal reflective layer relative to the first metal. The first metal may promote increased reflectivity relative to the second metal, and the second metal may promote increased mechanical stability, increased adhesion, and reduced electromigration. An exemplary metal reflective layer includes increased concentrations of the second metal near interfaces between the metal reflective layer and other layers of the LED chip. The second metal may also form concentration gradients in directions away from the interfaces. Related methods include sequentially forming discrete layers of the first and second metals, followed by annealing to form the metal reflective layer.
    Type: Application
    Filed: July 29, 2024
    Publication date: January 29, 2026
    Inventors: Michael Check, Steven Wuester, Nikolas Hall
  • Publication number: 20250386619
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly light-directing structures in LED devices and related methods are disclosed. Exemplary light-directing structures include light-extraction films having one or more light-extraction elements with internal cavities for shaping emissions. Light-extraction elements and corresponding internal cavities are shaped to direct light emissions off center to provide LED devices with wider angle emissions. Internal cavities may be at least partially embedded within light-extraction films. Internal cavities may be bounded by angled inner sidewalls. Angled shapes of inner sidewalls and/or further angled shapes of outer sidewalls of light-extraction elements may effectively promote light to exit the LED chip at desired emission angles. Exemplary LED devices include LED chips and LED packages.
    Type: Application
    Filed: June 17, 2024
    Publication date: December 18, 2025
    Inventors: Steven Wuester, Nikolas Hall, Michael Check
  • Publication number: 20240072099
    Abstract: Light-emitting diodes (LEDs) and more particularly LED chip structures are disclosed. LED chip structures include arrangements of one or more contacts, interconnects, contact structures, and/or reflective layers that effectively route electrically conductive paths while also reducing instances of closely spaced electrically charged metals of opposing polarities. Certain LED chip structures include electrically isolated metal-containing layers in various chip locations that allow for the presence of n-contact interconnects that are vertically arranged under or proximate to a p-contact. Certain contact structures include various arrangements, including segmented contact structures, that extend laterally to electrically couple groups of n-contact interconnects across various LED chip portions.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Michael Check, Steven Wuester, Seth Joseph Balkey, Nikolas Hall
  • Publication number: 20230395754
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures in LED chips for reducing voiding of bonding metals are disclosed. LED chips include active LED structures on carrier submounts and contact structures arranged to receive external electrical connections adjacent the active LED structures. Exemplary contact structures include contacts electrically coupled to active LED structures and dielectric structures beneath the contacts. Dielectric structures are arranged beneath portions of the contacts while still allowing electrical connections therethrough. Such dielectric structures may be provided as regions of dielectric material with spacings that control topography of underlying bonding metals to reduce voiding.
    Type: Application
    Filed: April 18, 2023
    Publication date: December 7, 2023
    Inventors: Michael Check, Justin White, Steven Wuester, Nikolas Hall, Kevin Haberern, Colin Blakely, Jesse Reiherzer
  • Publication number: 20230395760
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly passivation structures for LED chips are disclosed. LED chips include active LED structures, typically formed of epitaxial semiconductor layers, that include mesas with mesa sidewalls. Passivation structures include a passivation layer that bounds the mesa sidewalls. The passivation layer includes a material that is robust to etchants of active LED structures when forming the mesas to reduce damage in underlying portions of the LED chip. The passivation layer effectively forms a seal along the mesa sidewalls that reduces unwanted undercutting or erosion during etching, thereby providing improved reliability, reduced moisture ingress, and the flexibility to enable additional chip structures, such as light extraction features.
    Type: Application
    Filed: April 18, 2023
    Publication date: December 7, 2023
    Inventors: Michael Check, Justin White, Steven Wuester, Nikolas Hall, Kevin Haberern, Colin Blakely, Jesse Reiherzer
  • Patent number: 11145689
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips and related methods are disclosed. LED chips are provided that include an indicia arranged between a primary light-emitting face and a mounting face of the LED chip. The indicia may include at least one of a logo, one or more alphanumeric characters, or a symbol, among others that are configured to convey information. Arrangements of at least one of an n-contact, a p-contact, or a reflector layer of the LED chip may form the indicia. LED chips are also provided where at least a portion of an indicia is arranged on a mounting face of the LED chip. Indicia are provided that may be visible through primary light-emitting faces when LED chips are electrically activated or electrically deactivated. In this regard, the indicia may be embedded within LED chips while still being able to convey information.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: October 12, 2021
    Assignee: CreeLED, Inc.
    Inventors: Nikolas Hall, Derek Miller, Anoop Mathew, Colin Blakely, Luis Breva, Jesse Reiherzer, David Todd Emerson
  • Publication number: 20200176507
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips and related methods are disclosed. LED chips are provided that include an indicia arranged between a primary light-emitting face and a mounting face of the LED chip. The indicia may include at least one of a logo, one or more alphanumeric characters, or a symbol, among others that are configured to convey information. Arrangements of at least one of an n-contact, a p-contact, or a reflector layer of the LED chip may form the indicia. LED chips are also provided where at least a portion of an indicia is arranged on a mounting face of the LED chip. Indicia are provided that may be visible through primary light-emitting faces when LED chips are electrically activated or electrically deactivated. In this regard, the indicia may be embedded within LED chips while still being able to convey information.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Inventors: Nikolas Hall, Derek Miller, Anoop Mathew, Colin Blakely, Luis Breva, Jesse Reiherzer, David Todd Emerson