Abstract: Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information. The memory cell can include alternating layers of active, passive, diode, and barrier layers positioned between at least two electrodes.

Abstract: Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.

Abstract: Disclosed are memory devices with high data reading and writing speed along with capabilities for long term storage and high information density. The memory devices allow storage of several bits of data, have fast resistance switching and require low operating voltage but at the same time allow to combine its manufacturing technology with the modern semiconductor manufacturing technology. An exemplary implementation option of the memory cell contains two continuous electrodes between which there is a multilayer functional zone consisting of one active layer, one barrier layer and one passive layer.

Abstract: Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information.

Abstract: Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.