Abstract: Current pulse circuit for the supply of a well-defined current pulse to a ferrite core memory of the type where a desired current loop is set up by means of current gates according to a coordinate system. In order to reduce power loss and activation time the circuit is provided with a current regulator comprising a number of parallel-connected output transistors connected as emitter-followers. Base current is supplied to the output transistors by a driver circuit which is controlled by a control voltage received from a comparator circuit in correspondence with the difference between the momentary value of the pulse current and a target value produced by a reference source. The circuit may be further improved by the inclusion of an auxiliary current circuit in parallel with the output transistors, dimensioned to supply an auxiliary current which is equal to or less than the target value.