Patents by Inventor Nima TaheriNejad

Nima TaheriNejad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298664
    Abstract: Memristive logic gate circuit, comprising a first memristive device (1), representing a first input node A of the logic gate circuit, a second memristive device (2), representing a second input node B of the logic gate circuit, and a third memristive device (3), representing an output node F of the logic gate circuit, wherein the first memristive device (1) and the second memristive device (2) are connected in series between a positive supply voltage terminal Vx (7) and a negative supply voltage terminal ?Vx (8), wherein a connection point (6) is formed between the first memristive device (1) and the second memristive device (2), and wherein the third memristive device (3) is provided between the connection point (6) and a Ground contact (9).
    Type: Application
    Filed: September 28, 2021
    Publication date: September 21, 2023
    Inventor: Nima Taherinejad
  • Publication number: 20230195621
    Abstract: Disclosed herein is an architecture for in-memory sorting of data and methods by utilizing memristors crossbar arrays to perform in-memory sorting for both unary bit-stream and binary format data sets and method for utilizing same. Evaluations of the disclosed architecture and method reflect a significant reduction in energy costs and processing time as compared to currently available solutions.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 22, 2023
    Applicant: UNIVERSITY OF LOUISIANA LAFAYETTE
    Inventors: Mohammadhassan NAJAFI, Mohsen Riahi Alam, Nima Taherinejad
  • Publication number: 20220334800
    Abstract: The multiplication method disclosed herein benefits from the complementary advantages of both Stochastic Computing (SC) and memristive In-Memory Computation (IMC) to enable energy-efficient and low-latency multiplication of data. In summary, the following method are disclosed. (a) Performing deterministic and accurate bit-stream-based multiplication in memory. To this end, the invention disclosed herein uses memristive crossbar memory arrays and Memory-Aided Logic (MAGIC). (b) Using an efficient in-memory method for generating deterministic bit-streams from binary data, which takes advantage of inherent properties of memristive memories. (c) Improving the speed and reducing the memory usage as compared to the State-of-the-Art (SoA) limited-precision in-memory binary multipliers. (d) Reducing latency and energy consumption compared to the SoA accurate off-memory SC multiplication techniques.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 20, 2022
    Applicant: UNIVERSITY OF LOUISIANA AT LAFAYETTE
    Inventors: Mohammadhassan Najafi, Mohsen Riahi Alam, Nima TaheriNejad