Abstract: In an embodiment, the design of a digital circuit may be analyzed to identify which uninitialized memory elements, such as flops, have initial don't care values. The analysis may include determining that that each possible initial value (e.g. zero and one) of the flops does not impact the outputs of circuitry to which the uninitialized flops are connected. For example, a model may be generated that includes two instances of the uninitialized flops and corresponding logic circuitry. The inputs of the two instances may be connected together, and the uninitialized flops may be initialized to zero in one instance and one in the other instance. If the outputs of the two instances are equal for any input stimulus, the initial value of the uninitialized flops may be don't cares. The flops may be safely initialized to a known value for simulation.

Abstract: In an embodiment, the design of a digital circuit may be analyzed to identify which uninitialized memory elements, such as flops, have initial don't care values. The analysis may include determining that that each possible initial value (e.g. zero and one) of the flops does not impact the outputs of circuitry to which the uninitialized flops are connected. For example, a model may be generated that includes two instances of the uninitialized flops and corresponding logic circuitry. The inputs of the two instances may be connected together, and the uninitialized flops may be initialized to zero in one instance and one in the other instance. If the outputs of the two instances are equal for any input stimulus, the initial value of the uninitialized flops may be don't cares. The flops may be safely initialized to a known value for simulation.

Abstract: A method and computer program for verifying a design of a circuit comprises providing a model of the design; providing a first property for the design, wherein the first property describes a first behavior; checking the model using the first property and an environment of the design starting at a reset state until an example of the first behavior occurs; providing a second property for the design, wherein the second property describes a second behavior; and checking the model using the second property and an environment of the design starting at a state when the example of the first behavior occurs.

Abstract: A method and computer program for verifying a design of a circuit comprises selecting a portion of a model of the design having a plurality of inputs and outputs; providing a property for the design that defines a predetermined behavior of one or more of the outputs; determining whether a stimulus exists that, when applied to the inputs of the portion, can produce a behavior other than the predetermined behavior at the outputs of the portion; when the stimulus exists, determining whether the model of the design of the circuit can produce the stimulus at the inputs of the portion of the model of the circuit; and when the stimulus cannot be produced by the model of the design of the circuit at the inputs of the portion of the model of the circuit, preserving a description of the stimulus for analysis.

Abstract: A method and computer program for testing a design of a circuit comprises providing a model of the design; providing a first property for the design, wherein the first property describes a first behavior; checking the model using the first property and an environment of the design at a reset state until an example of the first behavior occurs; providing a second property for the design, wherein the second property describes a second behavior; and checking the model using the second property and an environment of the design at a state when the example of the first behavior occurs.