Patents by Inventor Nina Tsukamoto
Nina Tsukamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9639417Abstract: A storage control apparatus controls a storage device. The storage device includes a first storage area and a second storage area different from the first storage area. An error detection information storage unit generates an ECC for each of data blocks in data to be written, as error detection information. The error detection information storage unit stores generated ECC 1 to ECC 4 in the first storage area. A data storage unit stores data blocks DB1 to DB4 in the second storage area. A detection unit performs error detection on each of the data blocks according to the error detection information read from the first storage area and the data to be written read from the second storage area.Type: GrantFiled: March 12, 2015Date of Patent: May 2, 2017Assignee: FUJITSU LIMITEDInventors: Keiya Ishikawa, Nina Tsukamoto
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Publication number: 20160259579Abstract: A processor generates, according to difference information that represents a difference between stationary points in a volume that represents a management unit for a storage area and that is associated with a plurality of generations, aggregate information in which the difference information for the plurality of generations is aggregated. The processor is configured to associate the aggregate information with a state of the volume at an oldest stationary point. The processor is configured to associate update information for a volume that has been updated from a state of the volume at a latest stationary point.Type: ApplicationFiled: February 1, 2016Publication date: September 8, 2016Applicant: FUJITSU LIMITEDInventors: Goro Yamada, Yoshimasa MISHUKU, Tomoaki Sasaki, Nina Tsukamoto
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Patent number: 9207741Abstract: A storage apparatus includes first and second controller modules. The first controller module monitors power states of the first and second controller modules. When the monitoring results indicate that the power state of the first controller module is an ON state and the power state of the second controller module is an ON processing state in which an ON process of switching from OFF to ON is being executed, the first controller module maintains the power state of the first controller module upon detection of a power control signal for controlling the power state of the first controller module.Type: GrantFiled: March 8, 2013Date of Patent: December 8, 2015Assignee: FUJITSU LIMITEDInventors: Nina Tsukamoto, Shigeyuki Maeda
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Publication number: 20150278009Abstract: A storage control apparatus controls a storage device. The storage device includes a first storage area and a second storage area different from the first storage area. An error detection information storage unit generates an ECC for each of data blocks in data to be written, as error detection information. The error detection information storage unit stores generated ECC 1 to ECC 4 in the first storage area. A data storage unit stores data blocks DB1 to DB4 in the second storage area. A detection unit performs error detection on each of the data blocks according to the error detection information read from the first storage area and the data to be written read from the second storage area.Type: ApplicationFiled: March 12, 2015Publication date: October 1, 2015Inventors: Keiya ISHIKAWA, Nina TSUKAMOTO
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Patent number: 9092453Abstract: A monitoring device includes a detection unit which is inserted between the device to be monitored and a processing apparatus performing processing for the device to be monitored and detects a failure which occurs in the device to be monitored, a notification unit generating failure information indicating a content of the failure detected by the detection unit and notifying the generated failure information and the occurrence of the failure to the processing apparatus, and an acquisition unit acquiring status information after the occurrence of the failure of the device to be monitored from the device to be monitored and storing the acquired status information in a storage unit as the failure occurs.Type: GrantFiled: May 26, 2013Date of Patent: July 28, 2015Assignee: FUJITSU LIMITEDInventors: Nina Tsukamoto, Shinnosuke Matsuda
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Patent number: 8949634Abstract: An OOB sequence monitoring unit detects that an OOB sequence carried out between a base device as a superior device and a connection I/F which operates even if an extension device is in a standby state has proceeded to a given stage. Based on the detection by the OOB sequence monitoring unit, a power supply control unit instructs a starting power supply unit to supply power. When the extension device starts, the OOB sequence is carried out between the extension device and the connection I/F of another extension device in the same manner. As a result, extension devices are started in decreasing order from the extension device closest to the superior device.Type: GrantFiled: December 30, 2008Date of Patent: February 3, 2015Assignee: Fujitsu LimitedInventors: Yuichi Sakagami, Nina Tsukamoto, Oumar Thielo, Nobuyuki Honjo
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Patent number: 8862808Abstract: A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.Type: GrantFiled: February 22, 2012Date of Patent: October 14, 2014Assignee: Fujitsu LimitedInventors: Nina Tsukamoto, Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano
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Patent number: 8832355Abstract: A storage device includes a programmable device into which predetermined control data is written, a control data storing unit that stores therein write control data and read control data, the write control data being control data for realizing a function to save data stored in a cache memory into a nonvolatile memory when an abnormal shut-down occurs and the read control data being control data for realizing a function to restore the data saved in the nonvolatile memory into the cache memory when an electric power source is turned on after the abnormal shut-down, a writing unit that, when an electric power source is turned on after occurrence of the abnormal shut-down of the storage device, writes the read control data into the programmable device, and a restoring instructing unit that instructs the programmable device to restore the data saved in the nonvolatile memory into the cache memory.Type: GrantFiled: August 25, 2010Date of Patent: September 9, 2014Assignee: Fujitsu LimitedInventors: Terumasa Haneda, Nina Tsukamoto, Yuji Hanaoka
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Patent number: 8683308Abstract: Each of (n?1) 2-bit checking units, where n is an integer larger than or equal to 4, receives n-bit redundant encoded data generated from 1-bit input data, and outputs 2-bit check data based on a result of comparison between bits of the encoded data, combinations of the bits differing in each comparison. An all-bit checking unit outputs all-bit check data based on exclusive ORs of all-bit of the encoded data. An error detecting unit detects errors in the encoded data on the basis of the (n?1) sets of 2-bit check data and the all-bit check data, and outputs the input data on the basis of the result of error detection.Type: GrantFiled: February 24, 2012Date of Patent: March 25, 2014Assignee: Fujitsu LimitedInventors: Nina Tsukamoto, Toshihiro Tomozaki, Terumasa Haneda
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Publication number: 20140032855Abstract: An information processing apparatus includes a processor, a memory, and a cache. Information read from the memory by the processor is stored in the cache. The processor writes the information stored in the memory in all of the regions of the cache at a predetermined timing.Type: ApplicationFiled: July 29, 2013Publication date: January 30, 2014Applicant: FUJITSU LIMITEDInventors: Tatsuya SHINOZAKI, Nina TSUKAMOTO, Hidehiko NISHIDA
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Publication number: 20140032965Abstract: A monitoring device includes a detection unit which is inserted between the device to be monitored and a processing apparatus performing processing for the device to be monitored and detects a failure which occurs in the device to be monitored, a notification unit generating failure information indicating a content of the failure detected by the detection unit and notifying the generated failure information and the occurrence of the failure to the processing apparatus, and an acquisition unit acquiring status information after the occurrence of the failure of the device to be monitored from the device to be monitored and storing the acquired status information in a storage unit as the failure occurs.Type: ApplicationFiled: May 26, 2013Publication date: January 30, 2014Applicant: FUJITSU LIMITEDInventors: Nina Tsukamoto, Shinnosuke Matsuda
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Patent number: 8521953Abstract: In a storage device expandable through serially coupling two or more additional enclosures, each including a first additional controller and a second additional controller, to a controller enclosure, including a first controller and a second controller, a first route is formed by serially coupling the first controller of the controller enclosure to the first additional controllers of the additional enclosures in the order of adding the additional enclosures and a second route is formed by serially coupling the second controller of the controller enclosure to the second additional controllers of the additional enclosures in an order different from that of adding the additional enclosures.Type: GrantFiled: January 3, 2011Date of Patent: August 27, 2013Assignee: Fujitsu LimitedInventors: Tomoyuki Kanayama, Shigeyuki Maeda, Nina Tsukamoto
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Patent number: 8479045Abstract: In a controller of a disk array device, when recovery from a power failure is detected, the controller instructs a reading section to transfer data in a burst mode using a large prefetch amount. When an error is detected, the controller causes the data to be transferred again for an area where the error is detected. Further, the controller designates different access ports for the reading section and an erasing section, and causes these sections to operate in parallel. The reading section reads cache data from a flash memory and stores the cache data in a cache memory. The erasing section uses the access port different from the access port of the reading section, to erase data that is stored in the flash memory and has been transferred by the reading section.Type: GrantFiled: February 3, 2011Date of Patent: July 2, 2013Assignee: Fujitsu LimitedInventors: Yuji Hanaoka, Nina Tsukamoto
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Patent number: 8448047Abstract: A storage device is for restoring the data saved in a nonvolatile memory to a cache memory, even if there is not a read response from the nonvolatile memory. In a data saving operation, parity data of to-be-saved data is generated, and the to-be-saved data and the parity data having CRCs and AIDs added thereto are written into a flash memory. In a data restoring operation, if an operation to read data from the flash memory is not completed within a predetermined period of time, the data reading operation is suspended, and additional data is set. The to-be-saved data having a data error corrected with the parity data is then written into the cache memory.Type: GrantFiled: August 27, 2010Date of Patent: May 21, 2013Assignee: Fujitsu LimitedInventors: Nina Tsukamoto, Sadayuki Ohyama, Yuji Hanaoka
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Publication number: 20120278688Abstract: Each of (n?1) 2-bit checking units, where n is an integer larger than or equal to 4, receives n-bit redundant encoded data generated from 1-bit input data, and outputs 2-bit check data based on a result of comparison between bits of the encoded data, combinations of the bits differing in each comparison. An all-bit checking unit outputs all-bit check data based on exclusive ORs of all-bit of the encoded data. An error detecting unit detects errors in the encoded data on the basis of the (n?1) sets of 2-bit check data and the all-bit check data, and outputs the input data on the basis of the result of error detection.Type: ApplicationFiled: February 24, 2012Publication date: November 1, 2012Applicant: FUJITSU LIMITEDInventors: Nina Tsukamoto, Toshihiro Tomozaki, Terumasa Haneda
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Patent number: 8286028Abstract: A backup method makes a backup of cache data to a nonvolatile memory by using a controller, the cache data being stored in the volatile memory. The backup method includes writing the cache data stored in the volatility memory in a selected area of the nonvolatile memory, generating party data by operating the parity operations between each of the predetermined parts of the cache data in the volatile memory, verifying whether an error found in the part of the cache data in the nonvolatile memory can be recovered by using the parity data, and rewriting the part of the cache data when the error found in the part of the cache data in the nonvolatile memory cannot be recovered by using the parity data in an area of the nonvolatile memory different from the selected area.Type: GrantFiled: August 3, 2010Date of Patent: October 9, 2012Assignee: Fujitsu LimitedInventors: Shinnosuke Matsuda, Sadayuki Ohyama, Kentaro Yuasa, Takanori Ishii, Yoko Kawano, Yuji Hanaoka, Nina Tsukamoto, Tomoharu Muro
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Publication number: 20120254636Abstract: A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.Type: ApplicationFiled: February 22, 2012Publication date: October 4, 2012Applicant: FUJITSU LIMITEDInventors: Nina TSUKAMOTO, Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano
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Publication number: 20110314236Abstract: In a control apparatus, a write control unit controls operation of writing data to a non-volatile storage unit. The write control unit is configurable with given control data. A control data storage unit stores first control data for the write control unit. An input reception unit receives second control data for the write control unit. A configuration unit configures the write control unit with the first control data stored in the control data storage unit when the first control data has a newer version number than that of the second control data received by the input reception unit, and with the second control data when the second control data has a newer version number than that of the first control data.Type: ApplicationFiled: May 11, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Atsushi Uchida, Yuji Hanaoka, Yoko Kawano, Nina Tsukamoto
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Patent number: 8074104Abstract: A controlling apparatus for controlling a disk array unit includes a cache memory for caching data of the disk array unit; a nonvolatile memory for storing the data in the cache memory; and a control unit for detecting a defective location in the nonvolatile memory where the data is stored defectively and updating information indicating the defection location, for generating an error detection code of the updated information, for writing the generated information and the associated error detection code into an area of the nonvolatile memory different from any area where any information indicating any defective location previously detected and stored into the nonvolatile memory, and for controlling writing the data in the cache memory into a location of the nonvolatile memory designated by any selected one of the information stored in the nonvolatile memory.Type: GrantFiled: August 3, 2010Date of Patent: December 6, 2011Assignee: Fujitsu LimitedInventors: Tomoharu Muro, Nina Tsukamoto, Yuji Hanaoka, Yoko Kawano
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Publication number: 20110179234Abstract: In a storage device expandable through serially coupling two or more additional enclosures, each including a first additional controller and a second additional controller, to a controller enclosure, including a first controller and a second controller, a first route is formed by serially coupling the first controller of the controller enclosure to the first additional controllers of the additional enclosures in the order of adding the additional enclosures and a second route is formed by serially coupling the second controller of the controller enclosure to the second additional controllers of the additional enclosures in an order different from that of adding the additional enclosures.Type: ApplicationFiled: January 3, 2011Publication date: July 21, 2011Applicant: Fujitsu LimitedInventors: Tomoyuki KANAYAMA, Shigeyuki Maeda, Nina Tsukamoto