Abstract: A noise filtering device, method, and chip for a dynamic vision sensor (DVS), and an event-driven vision device, and an electronic device are provided. In order to meet multi-dimensional requirements of a denoising solution such as power consumption, delay, storage resources, calculation resources, denoising effect, applicable range of noise types, and hardware implementation difficulty, in this disclosure, global space-domain and time-domain informations are simultaneously aggregated in a shift register, or latest time-domain informations are collected through a space domain, and finally, whether an event generated by a DVS is a noise event is judged on the basis of clustering of space-domain informations and the time-domain informations. While achieving excellent denoising performance, this disclosure has outstanding advantages in the aforementioned multiple dimensions because of advantages of parallel and simple calculation and no dependence on a DVS resolution, etc.

Abstract: A sensor adjustment method includes obtaining a folding status parameter, where the folding status parameter is used to describe a folding extent of a foldable device, and where a component of the foldable device in a folded state causes interference to a first sensor of the foldable device compared with a non-folded state; invoking a sensor adjustment corresponding to the folding status parameter; and adjusting a sensor operating parameter of the first sensor according to the sensor adjustment and/or performing data preprocessing on first sensor data collected by the first sensor.

Abstract: The present disclosure relates to an event-driven integrated circuit that includes a sensor, an interface system, and a processor. The interface module includes a copy module, a merge module, a sub-sampling module, an ROI module, and an event routing module. The modules constitute a programmable daisy chain. The sensor, interface system and processor are coupled to a single chip through an interposer or manufactured in a same die by different manufacturing processes. In contrast to prior art, the event-driven integrated circuit with lower chip occupied area and manufacturing cost can eliminate the signal loss and noise interference, and achieve high-speed signal processing, solving the technical problems of larger chip area and weak signal processing ability. The interface system enriches the functions and configurability of the interface system, and provides various advantages in power consumption, function, and speed for subsequent processing.

Abstract: The present disclosure relates to a spike event decision-making device, method, chip, and electronic device to eliminate inherent delays of an output spike event of the neuromorphic chip when reading decisions. The spike event decision-making device includes a first counting module configured to count a number of input spike events of the spiking neural network, a second counting module configured to count some or all of the output spike events of the spiking neural network; and a decision-making module configured to generate a decision-making result according to numbers of spike events fired by neurons in an output layer of the spiking neural network when the number counted by the first counting module reaches a first predetermined value, or when the total count counted by the second counting module reaches a second predetermined value.

Abstract: A noise filtering device, method, and chip for a dynamic vision sensor (DVS), and an event-driven vision device, and an electronic device are provided. In order to meet multi-dimensional requirements of a denoising solution such as power consumption, delay, storage resources, calculation resources, denoising effect, applicable range of noise types, and hardware implementation difficulty, in this disclosure, global space-domain and time-domain informations are simultaneously aggregated in a shift register, or latest time-domain informations are collected through a space domain, and finally, whether an event generated by a DVS is a noise event is judged on the basis of clustering of space-domain informations and the time-domain informations. While achieving excellent denoising performance, this disclosure has outstanding advantages in the aforementioned multiple dimensions because of advantages of parallel and simple calculation and no dependence on a DVS resolution, etc.

Abstract: A computing device includes computing modules, each of which comprises a plurality of neuron populations. The computing module is configured to project the input spike train which is weighted by a first weight matrix to a first neuron population through a multi-synapse projection. The multi-synapse projection has at least two different and positive synaptic time constants, or at least two different synaptic transmission delays. In order to realize time-domain convolution in a spiking neural network with low hardware resource consumption, a multi-synaptic projection technology means with different synaptic time constants is proposed. On this basis, a waveform-aware spike neural network for time-domain signal processing characterized by residual connections and skip connections is further proposed. Through these technical means, the performance gap between SNN and ANN is bridged, and SNN with performance reaching or close to ANN is obtained.

Abstract: A frame image conversion spike system is disclosed. In order to solve the technical problem of high power consumption when converting a frame image into a spike event, a frame rate or difference frame frequency is adaptively adjusted according to the amount of effective pixel change between frame images, so as to reduce system power consumption and adaptively respond to scene application needs. In order to solve the issue of low inference accuracy after converting frame images into spike events and directly applying them to an SNN processor, a global randomization scheme is proposed considering the randomization process of images as a whole. It has opened up all the links of applying a frame image sensor to the SNN processor and provided an alternative to an event camera. This is suitable for a brain-inspired chip and AIoT field.

Abstract: A divisive normalization method, device, audio feature extractor, and a chip are disclosed. For improving the robustness against variations of the background noise, the proposed per-channel divisive normalization method comprises: obtaining an average number of input spikes over an averaging window by a low-pass filter to produce a threshold parameter, then deciding whether to enable an integrate-and fire (IAF) counter counting over a clock period of a divisive normalization module, when the count value of IAF counter reaches the threshold, resetting IAF counter and producing a single spike at the output. Compared with the prior art, the proposed method does not require any Linear Feedback Shift Register (LFSR) and is easier to implement. It also has a simpler structure, higher accuracy and better statistical performance, and a lower cost and a lower power consumption.

Abstract: A sensor adjustment method includes obtaining a folding status parameter, where the folding status parameter is used to describe a folding extent of a foldable device, and where a component of the foldable device in a folded state causes interference to a first sensor of the foldable device compared with a non-folded state; invoking a sensor adjustment corresponding to the folding status parameter; and adjusting a sensor operating parameter of the first sensor according to the sensor adjustment and/or performing data preprocessing on first sensor data collected by the first sensor.

Abstract: The invention relates to an event-driven spiking convolutional neural network, comprising a plurality of layers, wherein each layer comprises a kernel module (110) configured to store and to process in an event-driven fashion kernel values of at least one convolution kernel (410); a neuron module (120) configured to store and to update in an event-driven fashion neuron states of neurons of the spiking neural network (1), and to output spike events (150) generated from updated neurons (420); a memory mapper (130) configured to determine neurons (420) to which an incoming spike event (140) from a source layer projects by means of a convolution with at least one convolution kernel (410) and wherein neuron states of said determined neurons (420) are to be updated with applicable kernel values of the at least one convolution kernel (410), wherein the memory mapper (130) is configured to process incoming spike events in an event-driven fashion.

Abstract: Among other aspects, the present invention relates to a network comprising a plurality of interconnected core circuits (10) particularly arranged on several units (6), wherein each core circuit (10) comprises: an electronic array (8, 9) comprising a plurality of computing nodes (90) and a plurality of memory circuits (80) which is configured to receive incoming events, wherein each computing node (90) is configured to generate an event comprising a data packet when incoming events received by the respective computing node (90) satisfy a pre-defined criterion, and a circuit which is configured to append destination address and additional source information, particularly source core ID, to the respective data packet, and a local first router (R1) for providing intra-core connectivity and/or delivering events to intermediate level second router (R2) for inter-core connectivity and to higher level third router (R3) for inter-unit connectivity, and a broadcast driver (7) for broadcasting incoming events to all the

Abstract: The present disclosure belongs to the technical field of molecular biology, and provides an activator for simultaneously activating oxidative phosphorylation and inhibiting glycolysis and use thereof in preparation of anti-cancer drugs, where the activator is baicalein. The present disclosure has the following beneficial effects: the present disclosure provides an activator for simultaneously activating oxidative phosphorylation and inhibiting glycolysis, that is, baicalein. This activator can activate the oxidative phosphorylation while inhibiting the glycolysis, thereby killing cancer cells. This mechanism can be a new anti-cancer mechanism, and key proteins involved in related pathways can be new targets for drug development.

Abstract: Among other aspects, the present invention relates to a network comprising a plurality of interconnected core circuits (10) particularly arranged on several units (6), wherein each core circuit (10) comprises: an electronic array (8, 9) comprising a plurality of computing nodes (90) and a plurality of memory circuits (80) which is configured to receive incoming events, wherein each computing node (90) is configured to generate an event comprising a data packet when incoming events received by the respective computing node (90) satisfy a pre-defined criterion, and a circuit which is configured to append destination address and additional source information, particularly source core ID, to the respective data packet, and a local first router (R1) for providing intra-core connectivity and/or delivering events to intermediate level second router (R2) for inter-core connectivity and to higher level third router (R3) for inter-unit connectivity, and a broadcast driver (7) for broadcasting incoming events to all the

Abstract: A backlight module includes a light guide plate, alight emitting diode, a limiting block, an elastic member, and a bezel having a containing structure. The light guide plate is disposed in the containing structure and has a side surface and a light entrance surface opposite to the side surface. The light emitting diode is disposed at a position corresponding to the light entrance surface of the light guide plate for emitting light into the light guide plate via the light entrance surface. The limiting block is located at a side of the light emitting diode and extends inwardly from the containing structure for abutting against the light entrance surface. The elastic member abuts against at least one of the light entrance surface and the side surface and the containing structure and is used for providing elastic force to drive the light guide plate to abut against the limiting block.