Patents by Inventor Ning Sung

Ning Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11608476
    Abstract: A lubrication board includes a substrate; and a lubrication layer disposed on a surface of the substrate, wherein the lubrication layer comprises a polymer expressed by formula (I) below, formula (I); wherein R1 is selected from a substituted or unsubstituted C6-C18 alkyl; R2 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 alkyl which is interrupted by —O—; R3 is selected from —NH— or —S—; R4 is selected from —NH2, —OH or —SH; and n, p and q are positive integers ranging from 2 to 20000.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: March 21, 2023
    Assignee: MEGAOLOGY CHEMICAL CO., LTD.
    Inventors: Wen-Ning Sung, Cheng-Hsi Chen, Tien-Szu Li
  • Patent number: 11377614
    Abstract: A lubrication board includes a substrate; and a lubrication layer disposed on a surface of the substrate, wherein the lubrication layer comprises a polymer expressed by formula (I) below, formula (I); wherein R1 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 aryl; R2 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 alkyl which is interrupted by —O—; R3 is selected from —NH— or —S—; R4 is selected from —NH2, —OH or —SH; and n, p and q are positive integers ranging from 2 to 20000.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: July 5, 2022
    Assignee: MEGAOLOGY CHEMICAL CO., LTD.
    Inventors: Wen-Ning Sung, Cheng-Hsi Chen, Tien-Szu Li
  • Publication number: 20220056364
    Abstract: A lubrication board includes a substrate; and a lubrication layer disposed on a surface of the substrate, wherein the lubrication layer comprises a polymer expressed by formula (I) below, wherein R1 is selected from a substituted or unsubstituted C6-C18 alkyl; R2 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 alkyl which is interrupted by —O—; R3 is selected from —NH— or —S—; R4 is selected from —NH2, —OH or —SH; and n, p and q are positive integers ranging from 2 to 20000.
    Type: Application
    Filed: November 4, 2021
    Publication date: February 24, 2022
    Inventors: WEN-NING SUNG, CHENG-HSI CHEN, TIEN-SZU LI
  • Publication number: 20210355406
    Abstract: A lubrication board includes a substrate; and a lubrication layer disposed on a surface of the substrate, wherein the lubrication layer comprises a polymer expressed by formula (I) below, wherein R1 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 aryl; R2 is selected from a substituted or unsubstituted C2-C18 alkyl or C2-C18 alkyl which is interrupted by —O—; R3 is selected from —NH— or —S—; R4 is selected from —NH2, —OH or —SH; and n, p and q are positive integers ranging from 2 to 20000.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: WEN-NING SUNG, CHENG-HSI CHEN, TIEN-SZU LI
  • Patent number: 10096482
    Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: October 9, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Keung Hui, Jin-Ning Sung, Jong-I Mou, Soon-Kang Huang, Yen-Di Tsen
  • Patent number: 9477219
    Abstract: A method of semiconductor fabrication is provided. The method includes providing a model for a device parameter of a wafer as a function of first and second process parameters. The first and second process parameters correspond to different wafer characteristics, respectively. The method includes deriving target values of the first and second process parameters based on a specified target value of the device parameter. The method includes performing a first fabrication process in response to the target value of the first process parameter. The method includes measuring an actual value of the first process parameter thereafter. The method includes updating the model using the actual value of the first process parameter. The method includes deriving a revised target value of the second process parameter using the updated model. The method includes performing a second fabrication process in response to the revised target value of the second process parameter.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 25, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Wei Hsu, Jin-Ning Sung, Shin-Rung Lu, Jong-I Mou
  • Patent number: 9461497
    Abstract: A charge device coupled to an external device is provided. A connection port is configured to couple to the external device and includes a first pin and a second pin. A battery unit has a battery voltage. A conversion unit converts the battery voltage to provide power to the external device. When the battery voltage is higher than a threshold value, a detection control unit directs the first and second pins to couple to a first charge unit and the connection port outputs a first charge current to the external device. When the battery voltage is not higher than the threshold value, the detection control unit directs the first and second pins to couple to a second charge unit and the connection port outputs a second charge current to the external device. The first charge current is greater than the second charge current.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: October 4, 2016
    Assignee: Leading Tech-Semiconductor Co., Ltd.
    Inventors: Chia-Hao Tu, Ning Sung Chou
  • Publication number: 20150348797
    Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 3, 2015
    Inventors: Keung Hui, Jin-Ning Sung, Jong-I Mou, Soon-Kang Huang, Yen-Di Tsen
  • Patent number: 9102033
    Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: August 11, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keung Hui, Jin-Ning Sung, Huang Soon Kang, Yen-Di Tsen, Jong-I Mou
  • Publication number: 20150194824
    Abstract: A charge device coupled to an external device is provided. A connection port is configured to couple to the external device and includes a first pin and a second pin. A battery unit has a battery voltage. A conversion unit converts the battery voltage to provide power to the external device. When the battery voltage is higher than a threshold value, a detection control unit directs the first and second pins to couple to a first charge unit and the connection port outputs a first charge current to the external device. When the battery voltage is not higher than the threshold value, the detection control unit directs the first and second pins to couple to a second charge unit and the connection port outputs a second charge current to the external device. The first charge current is greater than the second charge current.
    Type: Application
    Filed: January 7, 2015
    Publication date: July 9, 2015
    Inventors: Chia-Hao TU, Ning Sung CHOU
  • Publication number: 20150184131
    Abstract: Human somatic cells are reprogrammed to become induced pluripotent stem cells (iPS cells) by the introduction of a minicircle DNA vector. Cells of interest include adipose stem cells.
    Type: Application
    Filed: January 6, 2015
    Publication date: July 2, 2015
    Inventors: Joseph Wu, Michael T. Longaker, Mark A. Kay, Ning Sung, FangJun Jia, Zhi-Ying Chen, Nicholas Panetta, Deepak Gupta
  • Patent number: 8962331
    Abstract: Human somatic cells are reprogrammed to become induced pluripotent stem cells (iPS cells) by the introduction of a minicircle DNA vector. Cells of interest include adipose stem cells.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: February 24, 2015
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Joseph Wu, Michael T. Longaker, Mark A. Kay, Ning Sung, FangJun Jia, Zhi-Ying Chen, Nicholas Panetta, Deepak Gupta
  • Patent number: 8549012
    Abstract: In accordance with an embodiment, a method for exception handling comprises accessing an exception type for an exception, filtering historical data based on at least one defined criterion to provide a data train comprising data sets, assigning a weight to each data set, and providing a current control parameter. The data sets each comprise a historical condition and a historical control parameter, and the weight assigned to each data set is based on each historical condition. The current control parameter is provided using the weight and the historical control parameter for each data set.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: October 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Feng Tsai, Jin-Ning Sung, Yen-Di Tsen, Jo Fei Wang, Jong-I Mou
  • Patent number: 8437870
    Abstract: System and method for implementing a VM APC platform are described. In one embodiment, the VM APC system comprises a process tool for processing a plurality of wafers, a metrology tool for measuring a sample wafer of the plurality of wafers and generating actual metrology data therefor, and a VM model for predicting metrology data for each of the plurality of wafers. The actual metrology data is received from the metrology tool and used to update the VM model. Key variables of the virtual metrology model are updated only in response to a determination that the VM model is inaccurate and parameters of the VM model are updated responsive to receipt of the actual metrology data for the sample wafer of the plurality of wafers. The system also includes an APC controller for receiving the predicted metrology data and the actual metrology data and controlling an operation of the process tool based on the received data.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: May 7, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Feng Tsai, Andy Tsen, Jin-Ning Sung
  • Patent number: 8394719
    Abstract: System and method for implementing multi-resolution advanced process control (“APC”) are described. One embodiment is a method including obtaining low resolution metrology data and high resolution metrology data related to a process module for performing a process on the wafer. A process variable of the process is modeled as a function of the low resolution metrology data to generate a low-resolution process model and the process variable is modeled as a function of the high resolution metrology data to generate a high-resolution process model.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: March 12, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Andy Tsen, Jin-Ning Sung, Po-Feng Tsai, Jong-I Mou, Yen-Wei Cheng
  • Publication number: 20120129431
    Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.
    Type: Application
    Filed: November 24, 2010
    Publication date: May 24, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: KEUNG HUI, Jin-Ning Sung, Huang Soon Kang, Yen-Di Tsen, Jong-I Mou
  • Publication number: 20110306268
    Abstract: A combination paper top includes a first paperboard and a second paperboard. One of the first and second paperboards is precut with a separable top top board, a separable top bottom board and a separable top sideboard. Printed layers are laid on surfaces of the first and second paperboards. The printed layers are printed with various colorful figures or words to combine education with recreation. After separated from the first and second paperboards, the top top board, the top bottom board and the top sideboard can be DIY assembled to form a hollow top main body. A support pin is inserted through the centers of the top top board and the top bottom board. A first end of the support pin serves as a spinning section, while a second end of the support pin serves as a tip of the top. The combination paper top also serves as a decoration.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 15, 2011
    Inventor: Wen-Ning SUNG
  • Publication number: 20110282885
    Abstract: In accordance with an embodiment, a method for exception handling comprises accessing an exception type for an exception, filtering historical data based on at least one defined criterion to provide a data train comprising data sets, assigning a weight to each data set, and providing a current control parameter. The data sets each comprise a historical condition and a historical control parameter, and the weight assigned to each data set is based on each historical condition. The current control parameter is provided using the weight and the historical control parameter for each data set.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 17, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Feng Tsai, Jin-Ning Sung, Yen-Di Tsen, Jo Fei Wang, Jong-I Mou
  • Publication number: 20110244566
    Abstract: Human somatic cells are reprogrammed to become induced pluripotent stem cells (iPS cells) by the introduction of a minicircle DNA vector. Cells of interest include adipose stem cells.
    Type: Application
    Filed: February 1, 2011
    Publication date: October 6, 2011
    Inventors: Joseph Wu, Michael T. Longaker, Mark A. Kay, Ning Sung, FangJun Jia, Zhi-Ying Chen, Nicholas Panetta, Deepak Gupta
  • Publication number: 20110238197
    Abstract: A method of semiconductor fabrication is provided. The method includes providing a model for a device parameter of a wafer as a function of first and second process parameters. The first and second process parameters correspond to different wafer characteristics, respectively. The method includes deriving target values of the first and second process parameters based on a specified target value of the device parameter. The method includes performing a first fabrication process in response to the target value of the first process parameter. The method includes measuring an actual value of the first process parameter thereafter. The method includes updating the model using the actual value of the first process parameter. The method includes deriving a revised target value of the second process parameter using the updated model. The method includes performing a second fabrication process in response to the revised target value of the second process parameter.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 29, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Wei Hsu, Jin-Ning Sung, Shin-Rung Lu, Jong-I Mou