Patents by Inventor Ning Wang

Ning Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210057325
    Abstract: Semiconductor devices and methods are provided. A method according to the present disclosure includes receiving a substrate that includes a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; forming a plurality of fins over the third semiconductor layer; forming a trench between two of the plurality of fins; depositing a dummy material in the trench; forming a gate structure over channel regions of the plurality of the fins; forming source/drain features over source/drain regions of the plurality of the fins; bonding the substrate on a carrier wafer; removing the first and second semiconductor layers to expose the dummy material; removing the dummy material in the trench; depositing a conductive material in the trench; and bonding the substrate to a silicon substrate such that the conductive material is in contact with the silicon substrate. The trench extends through the third semiconductor layer and has a bottom surface on the second semiconductor layer.
    Type: Application
    Filed: November 9, 2020
    Publication date: February 25, 2021
    Inventors: Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Wen-Ting Lan, Chih-Hao Wang
  • Publication number: 20210057535
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a substrate, and a hard mask layer formed over the fin structure. The semiconductor device structure also includes a gate structure formed surrounding the hard mask layer and the fin structure, and a portion of the gate structure is interposed between the fin structure and the hard mask layer. The semiconductor device structure further includes a source/drain (S/D) structure formed adjacent to the gate structure.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Cheng CHIANG, Kuan-Ting PAN, Huan-Chieh SU, Shi-Ning JU, Chih-Hao WANG
  • Publication number: 20210058031
    Abstract: An oscillator comprising an RC oscillator and a bandgap reference source, wherein the bandgap reference source provides a reference current for the RC oscillator, and a temperature coefficient of the reference current is adjustable. Since the oscillation frequency of the RC oscillator has less dependency on a power supply, a clock source having a relatively precise frequency thus can be obtained; and based on the RC oscillator, the bandgap reference source having a temperature compensation function is added, the reference current generated by the bandgap reference source with an adjustable temperature coefficient is used for temperature coefficient compensation to the inherent temperature coefficient of the oscillation frequency of the RC oscillator, thereby reducing the effect of the temperature on the oscillator, so that the output frequency of the oscillator does not change with the temperature as far as possible, which improves the oscillation frequency precision of the oscillator.
    Type: Application
    Filed: March 11, 2020
    Publication date: February 25, 2021
    Applicant: Shanghai Huali Microelectronics Corporation
    Inventors: Ning Zhang, Xuanli Zhu, Zhili Wang
  • Publication number: 20210054007
    Abstract: The present invention discloses a receptor inhibitor of formula (I), a pharmaceutical composition comprising the same and the use thereof.
    Type: Application
    Filed: March 22, 2019
    Publication date: February 25, 2021
    Inventors: Yanping ZHAO, Hongjun WANG, Yeming WANG, Xiang LI, Yuanyuan JIANG, Huai HUANG, Fajie LI, Liying ZHOU, Ning SHAO, Fengping XIAO, Zhenguang ZOU
  • Publication number: 20210057525
    Abstract: A method of forming a semiconductor device includes forming semiconductor strips protruding above a substrate and isolation regions between the semiconductor strips; forming hybrid fins on the isolation regions, the hybrid fins comprising dielectric fins and dielectric structures over the dielectric fins; forming a dummy gate structure over the semiconductor strip; forming source/drain regions over the semiconductor strips and on opposing sides of the dummy gate structure; forming nanowires under the dummy gate structure, where the nanowires are over and aligned with respective semiconductor strips, and the source/drain regions are at opposing ends of the nanowires, where the hybrid fins extend further from the substrate than the nanowires; after forming the nanowires, reducing widths of center portions of the hybrid fins while keeping widths of end portions of the hybrid fins unchanged, and forming an electrically conductive material around the nanowires.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 25, 2021
    Inventors: Kuo-Cheng Chiang, Huan-Chieh Su, Shi Ning Ju, Kuan-Ting Pan, Chih-Hao Wang
  • Patent number: 10930221
    Abstract: The present disclosure provides a light emitting unit, a driving method thereof, and a display device, belongs to the field of organic light emitting transistor (OLET) display technology, and can at least partially solve the problem of high power consumption of an existing OLET display technique. The light emitting unit includes an OLET and a driving circuit. The driving circuit is coupled to a control electrode and a first electrode of the OLET, and is configured to provide a data voltage to the control electrode of the OLET and provide a compensation voltage correlated with the data voltage to the first electrode of the OLET. A second electrode of the OLET is coupled to a first constant voltage terminal.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: February 23, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Liang Chen, Lei Wang, Xiaochuan Chen, Minghua Xuan, Li Xiao, Dongni Liu, Shengji Yang, Pengcheng Lu, Ning Cong, Detao Zhao
  • Patent number: 10931856
    Abstract: An electronic device includes an device body, where an opening is formed on the surface of the device body and a rotating shaft is provided within the device body; and a functional module rotatable around the rotating shaft, where the functional module is configured to be able to rotate into the device body or rotate out from the device body through the opening.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 23, 2021
    Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.
    Inventors: Ning Wu, Boyuan Wang
  • Patent number: 10930815
    Abstract: A light emitting device includes a light emitting structure and a distributed Bragg reflector (DBR) structure disposed thereon. The light emitting structure includes an n-type confinement layer, an active layer disposed on the n-type confinement layer, and a p-type confinement layer disposed on the active layer opposite to the n-type confinement layer. The n-type and p-type confinement layers are disposed proximal and distal to the DBR structure, respectively. The DBR structure includes first to Nth DBR units. The first and Nth DBR units are disposed proximal and distal to the light emitting structure, respectively. Each of the first to Nth DBR units has a center reflection wavelength defined by ?+(z?1)?0.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: February 23, 2021
    Assignee: Xiamen San'an Optoelectronics Co., Ltd.
    Inventors: Chao Liu, Zhendong Ning, Ling-Fei Wang, Jun-Zhao Zhang, Weihuan Li, Wen-Hao Gao, Chaoyu Wu, Duxiang Wang
  • Patent number: 10930203
    Abstract: A grayscale adjustment circuit, a driving method thereof and a display device are provided. The circuit includes: an input sub-circuit configured to output a signal of a data signal terminal to a driving sub-circuit under a control of the scanning signal terminal, the driving sub-circuit configured to store an output signal of the input sub-circuit and output a signal of the first voltage terminal to a switching control sub-circuit under a control of the output signal of the input sub-circuit, a switching time control sub-circuit configured to output a signal of each switching time signal terminal to the switching control sub-circuit under a control of each switching time control terminal, the switching control sub-circuit configured to output an output signal of the driving sub-circuit to the light-emitting sub-circuit under a control of an output signal of the switching time control sub-circuit to control the light-emitting sub-circuit to emit light.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: February 23, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Han Yue, Minghua Xuan, Ning Cong, Ming Yang, Can Zhang, Can Wang, Xiaochuan Chen
  • Patent number: 10930794
    Abstract: A method of fabricating a semiconductor device includes forming a fin extruding from a substrate, the fin having a plurality of sacrificial layers and a plurality of channel layers, wherein the sacrificial layers and the channel layers are alternately arranged; removing a portion of the sacrificial layers from a channel region of the fin; depositing a spacer material in areas from which the portion of the sacrificial layers have been removed; selectively removing a portion of the spacer material, thereby exposing the channel layers in the channel region of the fin, wherein other portions of the spacer material remain as a spacer feature; and forming a gate structure engaging the exposed channel layers.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng Ching, Shi Ning Ju, Guan-Lin Chen, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 10929598
    Abstract: At least one XML document to be validated is parsed, and XML data in the at least one XML document is represented as data objects in at least one data object model in a memory. At least one rule document is parsed and a rule object model that includes rule objects is created in the memory. At least part of the data objects are extracted from the at least one data object model and at least part of rule objects are extracted from the rule object model. Partial validation is performed in a corresponding execution context that validates the extracted at least part of the data objects based upon the extracted at least part of the rule objects.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Baldwin, Duncan G. Clark, Xin Peng Liu, Xi Ning Wang, Liang Xue, Yu Chen Zhou
  • Patent number: 10930767
    Abstract: FinFET patterning methods are disclosed for achieving fin width uniformity. An exemplary method includes forming a mandrel layer over a substrate. A first cut removes a portion of the mandrel layer, leaving a mandrel feature disposed directly adjacent to a dummy mandrel feature. The substrate is etched using the mandrel feature and the dummy mandrel feature as an etch mask, forming a dummy fin feature and an active fin feature separated by a first spacing along a first direction. A second cut removes a portion of the dummy fin feature and a portion of the active fin feature, forming dummy fins separated by a second spacing and active fins separated by the second spacing. The second spacing is along a second direction substantially perpendicular to the first direction. A third cut removes the dummy fins, forming fin openings, which are filled with a dielectric material to form dielectric fins.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: February 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng Ching, Shi Ning Ju, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 10929136
    Abstract: Branch prediction techniques are described that can improve the performance of pipelined microprocessors. A microprocessor with a hierarchical branch prediction structure is presented. The hierarchy of branch predictors includes: a multi-cycle predictor that provides very accurate branch predictions, but with a latency of multiple cycles; a small and simple branch predictor that can provide branch predictions for a sub-set of instructions with zero-cycle latency; and a fast, intermediate level branch predictor that provides relatively accurate branch prediction, while still having a low, but non-zero instruction prediction latency of only one cycle, for example. To improve operation, the higher accuracy, higher latency branch direction predictor and the fast, lower latency branch direction predictor can share a common target predictor.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: February 23, 2021
    Assignee: Futurewei Technologies, Inc.
    Inventors: Shiwen Hu, Wei Yu Chen, Michael Chow, Qian Wang, Yongbin Zhou, Lixia Yang, Ning Yang
  • Patent number: 10923685
    Abstract: This disclosure relates to a display and a method of fabricating the display. According to some embodiments, the display may comprise: an encapsulation sidewall; at least one isolation column adjacent to the encapsulation sidewall; and a processing module coupled with the at least one isolation column, configured to apply a voltage signal to the at least one isolation column according to a height of the encapsulation sidewall, such that the at least one isolation column deforms.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: February 16, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jianqiang Wang, Jin Xu, Ning Ao, Qi Liu
  • Patent number: 10921772
    Abstract: The invented equivalent-plane cross-coupling control method belongs to high-precision and high-efficiency intelligent multi-axis CNC (Computer Numerical Control) machining filed, featured a three-axis cross-coupling controller based on the equivalent plane which can be used for improvement of the three-dimensional contour-following accuracy. This method first find the foot point from the actual motion position to the desired contour using a tangential back stepping based Newton method. Then, establish an equivalent plane which containing the spatial contouring-error vector by passing through the actual motion position and the tangential line at the foot point. After that, estimate the three-dimensional contouring error in a scalar form, thus controlling the signed error using a PID based two-axis cross-coupling controller.
    Type: Grant
    Filed: January 7, 2018
    Date of Patent: February 16, 2021
    Assignee: Dalian University of Technology
    Inventors: Jianwei Ma, Zhenyuan Jia, Dening Song, Fuji Wang, Wei Liu, Ning Zhang, Siyu Chen, Guangzhi He
  • Publication number: 20210039282
    Abstract: Disclosed is a method of preparing a flexible deformable photonic crystal material for structural health monitoring, comprising the following steps: washing a grating master template; preparing and assembling a mold; obtaining an assembled mold by printing a three-dimensional mold comprising an upper die and a lower die by use of a 3D printing device and installing the grating master template on the three-dimensional mold; obtaining a polydimethylsiloxane (PDMS) one-dimensional photonic crystal film by replicating a one-dimensional grating structure of a surface of the grating master template by pouring PDMS into the assembled mold; finally, obtaining the PDMS one-dimensional photonic crystal film with a one-dimensional photonic crystal structure on a middle surface and protrusion structures at both ends by demolding, wherein the PDMS one-dimensional photonic crystal film is the flexible deformable photonic crystal material.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 11, 2021
    Applicant: SHANDONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Qing WANG, Rui ZHANG, Xu ZHENG, Ning WANG
  • Publication number: 20210041296
    Abstract: A system for detecting high-frequency radiation that offers near-quantum-limited sensitivity, broad spectral bandwidth, and high spectral resolution while operating at room temperature. The system can include an antenna assembly configured to receive at least a high-frequency radiation and a substrate comprising a semiconductor material with a contact-semiconductor interface connected to the antenna assembly. The system also includes an optical pump configured to produce an optical beam that has a high-frequency beat frequency, the optical beam contacting the contact-semiconductor interface to create an intermediate frequency signal by combining the optical beam with the high-frequency radiation. The system further includes a detector configured to detect the intermediate frequency and generate at least one report indicating the received, high-frequency radiation.
    Type: Application
    Filed: April 1, 2019
    Publication date: February 11, 2021
    Inventors: Mona Jarrahi, Ning Wang
  • Patent number: 10915703
    Abstract: At least one XML document to be validated is parsed, and XML data in the at least one XML document is represented as data objects in at least one data object model in a memory. At least one rule document is parsed and a rule object model that includes rule objects is created in the memory. At least part of the data objects are extracted from the at least one data object model and at least part of rule objects are extracted from the rule object model. Partial validation is performed in a corresponding execution context that validates the extracted at least part of the data objects based upon the extracted at least part of the rule objects.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Baldwin, Duncan G. Clark, Xin Peng Liu, Xi Ning Wang, Liang Xue, Yu Chen Zhou
  • Patent number: 10912479
    Abstract: A method for accurately extracting an abnormal potential within a QRS, comprising: in an ideal electrocardiographic signal pre-estimation stage, pre-estimating an ideal electrocardiographic signal using a non-linear transformation technology; according to the pre-estimated ideal electrocardiographic signal, further estimating the ideal electrocardiographic signal by using a spline method, so as to accurately estimate the ideal electrocardiographic signal; and according to the accurately estimated ideal electrocardiographic signal, accurately extracting an abnormal potential within the QRS by means of a mobile standard deviation analysis technology. The method can be used not only on an average electrocardiographic signal after multiple superimposition, but also on a single beat electrocardiographic signal.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: February 9, 2021
    Inventors: Xiangguo Yan, Ning Wu, Chongxun Zheng, Gang Wang
  • Publication number: 20210035865
    Abstract: The present disclosure provides a method of forming a semiconductor structure with a metal gate. The semiconductor structure is formed by first fabricating fins over a semiconductor substrate, followed by a formation of a source and a drain recess. A source and a drain region may then be deposited into the source and the drain recess. The gate structure may be deposited into the region between the fins. The gate structure includes dielectric and metallic layers. In the regions between the fins, the gate structure is isolated from the source and the drain region by an insulating layer.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Ching, Zhi-Chang Lin, Shi Ning Ju, Chih-Hao Wang, Kuan-Ting Pan