Patents by Inventor Ningyu Luo

Ningyu Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250183200
    Abstract: A light emitting substrate has a functional area and a bonding area. The bonding area and the functional area are arranged along a first direction in sequence. The light-emitting substrate includes a substrate, a plurality of functional element groups, and a first electrostatic pathway. The plurality of functional element groups are located on a side of the substrate and located in the functional area. The first electrostatic pathway is located on a same side of the substrate with the plurality of functional element groups. The first electrostatic pathway is electrically connected to the bonding area, a portion of the first electrostatic pathway is located in the functional area, and the first electrostatic pathway is configured to conduct static electricity from the functional area to the bonding area.
    Type: Application
    Filed: September 30, 2022
    Publication date: June 5, 2025
    Inventors: Yiding Sun, Bing Zhang, Liang Gao, Kangli Wang, Ping Kang, Jiawei Xu, Zouming Xu, Youlu Li, Bing Wang, Jie Wang, Xintao Wu, Ningyu Luo, Tingwei Han
  • Publication number: 20250113695
    Abstract: A wiring substrate includes a substrate and connection wires. At least one connection wire including a first connection end and another at least one connection wire including a second connection end, together define at least one bonding pad group. A bonding pad group is located in a region where a pair of first and second connection ends proximate to each other are located, and includes: at least one first sub-bonding pad, which is a portion of the first connection end, and at least two second sub-bonding pads, which are a portion of the second connection end. In the at least one first sub-bonding pad and the at least two second sub-bonding pads, a first sub-bonding pad is arranged adjacent to a second sub-bonding pad along a first direction, and arranged adjacent to another second sub-bonding pad along a second direction intersecting the first direction.
    Type: Application
    Filed: May 18, 2023
    Publication date: April 3, 2025
    Inventors: Xintao Wu, Zouming Xu, Jie Wang, Zhi Jin, Jiawei Xu, Ningyu Luo, Tingwei Han
  • Publication number: 20240372051
    Abstract: A wiring substrate includes a substrate, at least one conductive layer(s) located on a side of the substrate, and a protective layer located on a side of the at least one conductive layer. A conductive layer includes a plurality of pad groups, and a pad group includes a plurality of conductive pads. The protective layer includes a plurality of openings; a portion of the conductive layer exposed by an opening is a conductive pad. A maximum dimension of the conductive pad in a direction parallel to the substrate is greater than or equal to 1.5 times a minimum distance between an edge of the conductive pad and an edge of the conductive layer, and less than or equal to 30 times the minimum distance between the edge of the conductive pad and the edge of the conductive layer.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 7, 2024
    Inventors: Jie WANG, Zouming XU, Xintao WU, Zhi JIN, Tao LUO, Ningyu LUO, Tingwei HAN
  • Publication number: 20240373552
    Abstract: Provided is a wiring substrate, including: a base substrate; a plurality of constant voltage signal lines and a plurality of first connection lines; a plurality of first pad regions. Each of the first pad regions includes a plurality of sub-regions. Each of the sub-regions includes a plurality of pad groups. The plurality of pad groups include at least a first pad group and a last pad group. An orthographic projection of one of the first pad group and the last pad group on the base substrate is partially overlapped with an orthographic projection of one of the constant voltage signal lines on the base substrate. An orthographic projection of the other of the first pad group and the last pad group on the base substrate is partially overlapped with an orthographic projection of one of the first connection lines on the base substrate.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 7, 2024
    Inventors: Jiawei XU, Zouming XU, Xintao WU, Xiaoxiang ZHANG, Jie WANG, Ningyu LUO, Tingwei HAN
  • Publication number: 20240363824
    Abstract: An array substrate includes a base substrate, a conductive layer on a side of the base substrate, a light adjustment layer on a side of the conductive layer away from the base substrate, a plurality of signal lines on a side of the base substrate away from the conductive layer, and a protective layer between the light adjustment layer and the base substrate. The conductive layer includes a plurality of pads electrically connected with electronic elements. An orthographic projection of at least part of the light adjustment layer on the base substrate does not overlap an orthographic projection of the conductive layer on the base substrate, and is located in gaps between orthographic projections of adjacent signal lines on the base substrate. An orthographic projection of the protective layer on the base substrate at least covers the orthographic projection of the at least part on the base substrate.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Inventors: Ningyu LUO, Zouming XU, Xintao WU, Jiawei XU, Jie WANG, Tingwei HAN, Wenzhuo TANG
  • Publication number: 20240322099
    Abstract: The present disclosure provides a wiring substrate, a manufacturing method thereof, a light-emitting substrate, a display device. The wiring substrate includes a base substrate including a functional region and a bonding region, a first conductive layer at least in the functional region; a second conductive layer that is on the first conductive layer and at least in the functional region and connected to the first conductive layer; a first insulating layer on the second conductive layer and including a main part and an opening. At least one of the first and second conductive layers includes multiple electrodes in the bonding region and extending along a first direction, each electrode includes a first end adjacent to the functional region in the first direction, an orthographic projection of the main part on the base substrate at least partially overlaps with an orthographic projection of the first end on the base substrate.
    Type: Application
    Filed: June 2, 2022
    Publication date: September 26, 2024
    Inventors: Jie Wang, Zhi Jin, Xintao Wu, Zouming Xu, Huan Liu, Leiming Ding, Tingwei Han, Ningyu Luo
  • Publication number: 20240312917
    Abstract: Provided are a wiring substrate and an electronic device, the wiring substrate includes a substrate; first pad group, arranged on the substrate, each of the first pad group including an output pad; a constant voltage signal line, arranged on a same side of the substrate as the first pad group; and second pad groups, including a plurality of sub-pad groups connected in parallel, each of the sub-pad groups including a plurality of pad regions connected in series.
    Type: Application
    Filed: May 20, 2022
    Publication date: September 19, 2024
    Inventors: Tingwei HAN, Zouming XU, Jie WANG, Xintao WU, Jiawei XU, Ningyu LUO
  • Publication number: 20240312918
    Abstract: Provided are a wiring substrate and an electronic device. The wiring substrate includes a substrate; a first pad group on the substrate, the first pad group including a power supply pad and an output pad; a power signal line on the same side of the substrate as the first pad groups, the power signal line coupled with the power supply pads; a second pad group, arranged on the same side of the substrate as the first pad group, the second pad group including a plurality of sub-pad groups connected with each other, each sub-pad group at least including a first sub-pad and a second sub-pad, a first sub-pad in at least one of the plurality of sub-pad groups is coupled with the power signal line, and a second sub-pad in at least one of the plurality of sub-pad groups is coupled with the output pad of one first pad group.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 19, 2024
    Inventors: Xintao WU, Zouming XU, Jie WANG, Jiawei XU, Ningyu LUO, Tingwei HAN, Yuan LI
  • Publication number: 20240243241
    Abstract: A method of allocating widths for target signal lines, a wiring substrate, a light-emitting substrate and a display device are provided. The method includes numbering the target signal lines; performing the following operations at least once until the number of target signal lines in a set is zero, determining the set of target signal lines; determining a region R based on the conditions satisfied by a voltage drop V, a temperature rise T, and widths W of the target signal lines, determining the number i of the target signal line with the maximum voltage drop in the set; substituting a known length Li of the target signal line numbered i into V (L, W) to obtain V (Li, W) and obtaining Wi based on an intersection of V (Li, W) and a boundary of the region R, and removing the target signal line with the width Wi from the set.
    Type: Application
    Filed: June 30, 2022
    Publication date: July 18, 2024
    Inventors: Ningyu Luo, Zouming Xu, Xintao Wu, Jie Wang, Jiawei Xu, Tingwei Han