Abstract: Systems, methods, devices, and non-transitory media of the various embodiments facilitate real time playback of a digital broadcast by enabling reduction of the amount of time a receiver device's low power mode interface with a separate computing device operates in an operational/high power mode. The receiver device may associate a stream of media packets of a digital broadcast with system time clock timestamps indicating when the media packets were received, and store the media packets in a temporary packet buffer. Periodically, a media packet burst stored in the temporary packet buffer may be sent to the separate computing device via a low power mode interface operating in an operational/high-power mode different than a low power mode. The low power mode interface may be returned to the low-power mode until the next burst of packets is sent to the separate computing device.

Abstract: Dynamic predictive wake-up techniques are disclosed. A central processing unit (CPU) may initiate an input/output (I/O) transfer. The CPU may ascertain if a predicted time for the transfer exceeds an amount of time required to enter and exit a low-power mode and enter the low-power mode after the transfer is initiated. An I/O controller may calculate how long the transfer will take and compare that calculation to a known exit latency associated with the CPU. The calculated value is decremented by the amount of the known exit latency and the I/O controller may generate an early wake command at the decremented value. The CPU receives the early wake command and wakes such that the CPU is awake and ready to process data at conclusion of the transfer.

Abstract: Techniques for increased data flow in Universal Serial Bus (USB) cables are disclosed. In one aspect, two super-speed lanes may be enabled on a single USB cable. In an exemplary, non-limiting aspect, the USB cable is a Type-C cable. In further non-limiting aspects, the super-speed lanes may be present even if there is no USB 2.0 lane present on the D+/D? pins of the USB cable. Use of the second super-speed lane increases data throughput. Eliminating the requirement that the D+/D? pins be used for USB 2.0 data allows greater flexibility in the use of the USB connection because audio or video data may be sent over the D+/D? pins instead of USB 2.0 data. Further, the use of the two super-speed lanes allows a single computing element to operate as a host on one lane and a device on a second lane.

Abstract: Fast link training in embedded systems is disclosed. In one aspect, a host takes advantage of situations in which the host is coupled to one or more static devices through a communication bus. In particular, because the one or more devices are static, the host may be provided with information about the one or more devices before start up, so that when the host does perform a start up, the host already knows which device(s) to expect. Accordingly, the host may directly query the expected device(s), and after receipt of response(s) from the expected device(s), may begin link training the expected device(s). By using the provided information about the expected device(s) in this fashion, the host may bypass or skip an initial signal detection step used by conventional link training processes. Bypassing the initial signal detection step may save time, which in turn saves power.

Abstract: Enhanced communications over a Universal Serial Bus (USB) Type-C cable are disclosed. In one aspect, a link control circuit is provided in a USB host to enable one or more communication circuits in the USB host to transmit and receive protocol-specific data over a sideband use (SBU) interface according to communication protocols that may or may not be USB compliant. In another aspect, the link control circuit is provided in a USB client to enable one or more communication circuits in the USB client to transmit and receive protocol-specific data over the SBU interface according to communication protocols that may or may not be USB compliant. By configuring the USB host and the USB client to support multi-protocol communications via the SBU interface, it is possible to enable more flexible architectural design in mobile communication devices for enhanced performance and reduced costs.

Abstract: A Universal Serial Bus (USB) split cable is disclosed. In one aspect, the USB split cable provides a USB full-featured Type-C host plug for connecting to a USB Type-C receptacle in a USB host. In another aspect, the USB split cable provides a plurality of USB device plugs for connecting to a plurality of device clients, respectively. The plurality of USB device plugs can be configured individually with different data pin combinations to concurrently support different device clients. By providing the USB split cable, it is possible to support point-to-multipoint USB connection via the plurality of USB device plugs without a USB hub, thus improving mobility of the USB host while reducing costs and power consumption associated with the USB hub.

Abstract: Universal serial bus (USB) communication systems and methods are disclosed. In particular, aspects of the present disclosure optimize polling and scheduling of bulk data transfers from bulk endpoints connected through a USB connection. By reducing the amount of polling, and by favoring endpoints that are known to have data to transfer, unnecessary signaling is avoided. Reduction in signaling allows more data to be transferred in a shorter amount of time. Reducing the time required for a data transfer may allow for low power modes to be used, which in turn further saves power.

Abstract: Aspects of priority arbitration for interference mitigation are disclosed. In one aspect, a computing device is provided that employs a control system configured to arbitrate the activity of multiple interfaces. This arbitration mitigates potential electromagnetic interference (EMI) that may degrade the performance of the computing device. Upon a first interface requesting to become active, the control system is configured to determine if a second interface is currently active. If so, the control system is configured to arbitrate the activity of the first interface and the second interface to mitigate the potential EMI generated if the interfaces are concurrently active. The computing device includes an aggressor controller and a victim receiver, each corresponding to a particular interface. The control system is configured to arbitrate such activity so that the aggressor controller and corresponding cable do not generate EMI during a time period that would degrade the performance of the victim receiver.

Abstract: An apparatus and methods are disclosed for a bidirectional front-end circuit included within a system on chip (SoC). The bidirectional front-end circuit includes a differential bidirectional terminal for receiving and transmitting signals. The bidirectional front-end circuit is configured to provide a first communication path between a first controller and a connector through the differential bidirectional terminal when operating in a first mode. And, the bidirectional front-end circuit is reconfigured to provide a second communication path between a second controller and the connector through the differential bidirectional terminal when operating in a second mode.

Abstract: Aspects disclosed in the detailed description include scheduled universal serial bus (USB) low-power operations. In this regard, in one aspect, a USB host controller determines a low-power operation schedule for a USB client device. The low-power operation schedule comprises one or more scheduled low-power operation periods, each corresponding to a respective entry time and a respective exit time. The USB host controller communicates the low-power operation schedule to the USB client device using one or more USB standard packets. By scheduling the one or more scheduled low-power operation periods with respective entry and exit times, the USB host controller or the USB client controller is able to start and end the one or more scheduled low-power operation periods without incurring additional signaling, thus improving efficiency of the USB low-power operation. Further, by communicating the low-power operation schedule using USB standard packets, it is possible to preserve compatibility with USB standards.

Abstract: Fast link training in embedded systems is disclosed. In one aspect, a host takes advantage of situations in which the host is coupled to one or more static devices through a communication bus. In particular, because the one or more devices are static, the host may be provided with information about the one or more devices before start up, so that when the host does perform a start up, the host already knows which device(s) to expect. Accordingly, the host may directly query the expected device(s), and after receipt of response(s) from the expected device(s), may begin link training the expected device(s). By using the provided information about the expected device(s) in this fashion, the host may bypass or skip an initial signal detection step used by conventional link training processes. Bypassing the initial signal detection step may save time, which in turn saves power.

Abstract: Aspects of priority arbitration for interference mitigation are disclosed. In one aspect, a computing device is provided that employs a control system configured to arbitrate the activity of multiple interfaces. This arbitration mitigates potential electromagnetic interference (EMI) that may degrade the performance of the computing device. Upon a first interface requesting to become active, the control system is configured to determine if a second interface is currently active. If so, the control system is configured to arbitrate the activity of the first interface and the second interface to mitigate the potential EMI generated if the interfaces are concurrently active. The computing device includes an aggressor controller and a victim receiver, each corresponding to a particular interface. The control system is configured to arbitrate such activity so that the aggressor controller and corresponding cable do not generate EMI during a time period that would degrade the performance of the victim receiver.

Abstract: Systems and methods for conserving power in a universal serial bus (USB) are disclosed. In one aspect, when a USB device enters a low power mode (e.g., U1 or U2), a clock associated with the USB device is modified to also enter a low power mode. Since the PIPE interface associated with the USB device still requires a clock signal, the low power clock mode must still be able to provide the PIPE interface with a clock signal. However, the clock signal to the PIPE interface does not need to be the same frequency or accuracy as the clock signal used by the USB interface. The modification to the clock changes the clock frequency to a low frequency compared to the normal clock frequency. By using a low frequency clock for the PIPE interface, power is conserved while preserving the functionality of the PIPE interface.

Abstract: Universal serial bus (USB) communication systems and methods are disclosed. In particular, aspects of the present disclosure optimize polling and scheduling of bulk data transfers from bulk endpoints connected through a USB connection. By reducing the amount of polling, and by favoring endpoints that are known to have data to transfer, unnecessary signaling is avoided. Reduction in signaling allows more data to be transferred in a shorter amount of time. Reducing the time required for a data transfer may allow for low power modes to be used, which in turn further saves power.

Abstract: Device identification generation in electronic devices to allow external control, such as selection or reprogramming, of device identification for bus communications identification, is disclosed. In this manner, device identifications of electronic devices coupled to a common communications bus in a system can be selected or reprogrammed to ensure they are unique to avoid bus communications collisions. In certain aspects, to select or reprogram a device identification in an electronic device, an external source can be electrically coupled to the electronic device. The external source closes a circuit with a device identification generation circuit in the electronic device. The closed circuit provides a desired electrical characteristic detectable by the device identification generation circuit. The device identification generation circuit is configured to generate a device identification as a function of the detected electrical characteristics of the closed circuit from the external source.

Abstract: Systems, methods, devices, and non-transitory media of the various embodiments facilitate real time playback of a digital broadcast by enabling reduction of the amount of time a receiver device's low power mode interface with a separate computing device operates in an operational/high power mode. The receiver device may associate a stream of media packets of a digital broadcast with system time clock timestamps indicating when the media packets were received, and store the media packets in a temporary packet buffer. Periodically, a media packet burst stored in the temporary packet buffer may be sent to the separate computing device via a low power mode interface operating in an operational/high-power mode different than a low power mode. The low power mode interface may be returned to the low-power mode until the next burst of packets is sent to the separate computing device.

Abstract: Systems and methods for low voltage secure digital (SD) interfaces are disclosed. Embodiments of the present disclosure relate to systems and voltage for a lower voltage SD or SD Input/Output (SDIO) interface such as two integrated circuits. In particular, a SD or SDIO interface may be established between two SD compliant devices. While the SD compliant devices may otherwise comply with the SD standard, the voltage levels for signals passed between the SD compliant devices may be below 1.8 volts that the standard mandates. This reduced voltage is possible because the distances involved for interchip communication or the short distances involved for mobile terminal to peripheral connection are short enough that the reduced voltage is sufficient to still provide the desired signal strength at the receiver.