Abstract: A computer implemented decoding method includes decoding a number of run-length encoded mask strings to obtain decoded mask bits for each of a number of scan channels. The method also includes applying the decoded mask bits to automatic test pattern generator (ATPG) scan response data of each scan channel to obtain a multiple input signature register (MISR) signature.

Abstract: Aspects of the disclosure are directed to a built-in self test (BIST) mode save and restore operation. In accordance with one aspect, the disclosure includes executing a save directive for an initial state of a digital logic system in an operational mode; executing a built-in self test (BIST) sequence on the digital logic system in a built-in self test (BIST) mode; and executing a restore directive in the digital logic system in the operational mode.

Abstract: Aspects of the disclosure are directed to a test mode save and restore operation. In accordance with one aspect, the disclosure includes a hold latch cell configured to execute a save directive for a first operational state of a digital logic system and to execute a restore directive for the first operational state in the digital logic system in an operational mode; a first multiplexer coupled to the hold latch cell, the first multiplexer configured to execute a test sequence on the digital logic system in a test mode; and a logical XOR circuit coupled to the hold latch cell, the logical XOR circuit configured to perform a fault detection on the save directive and the restore directive to generate an error flag signal.

Abstract: A method of explicit lockstep for functional safety includes spawning, by a main thread, a first safe thread core and a second safe thread core. The method also includes initializing and mapping a first data register associated with the first safe thread core to each safe variable of a set of predetermined safe variables. The method further includes initializing and mapping a second data register associated with the second safe thread core to each safe variable of the set of predetermined safe variables. The method also includes comparing, by a hardware comparator, a first safe variable value in the first data register to a second safe variable value in the second register. The method further includes issuing an error completion to the first safe thread core and the second safe thread core when the hardware comparator detects a mismatch between the first data register and the second data register.

Abstract: A method of explicit lockstep for functional safety includes spawning, by a main thread, a first safe thread core and a second safe thread core. The method also includes initializing and mapping a first data register associated with the first safe thread core to each safe variable of a set of predetermined safe variables. The method further includes initializing and mapping a second data register associated with the second safe thread core to each safe variable of the set of predetermined safe variables. The method also includes comparing, by a hardware comparator, a first safe variable value in the first data register to a second safe variable value in the second register. The method further includes issuing an error completion to the first safe thread core and the second safe thread core when the hardware comparator detects a mismatch between the first data register and the second data register.

Abstract: A method for electronic imaging includes controlling an image sensor to capture a first sequence of first input images at a first frame rate having a first spatial resolution, and to capture a second sequence of second input images, interleaved with the first sequence and having a second spatial resolution lower than the first spatial resolution. The first and second sequences of the input images are processed to generate an third sequence of output images at a second frame rate higher than the first frame rate and having a third spatial resolution higher than the second spatial resolution.

Abstract: A method for electronic imaging includes controlling an image sensor to capture a first sequence of first input images at a first frame rate having a first spatial resolution, and to capture a second sequence of second input images, interleaved with the first sequence and having a second spatial resolution lower than the first spatial resolution. The first and second sequences of the input images are processed to generate an third sequence of output images at a second frame rate higher than the first frame rate and having a third spatial resolution higher than the second spatial resolution.