Patents by Inventor Nir Segev

Nir Segev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164686
    Abstract: A system includes an interface and a processor. The interface is configured to receive, from at least first and second electrodes of a catheter, first and second signals, respectively, which are acquired over at least a time interval by the at least first and second electrodes at an organ of a patient. The processor is configured to produce a three-dimensional (3D) representation of at least a portion of the catheter and first and second traces corresponding to the first and second signals, and the first and second traces are displayed in a 3D space relative to physical positions of the first and second electrodes on the catheter, respectively.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 23, 2024
    Inventors: Daniel Ghosalker, Meytal Segev, Nir Yanovich, Roy Haim Karny, Alon Ben Natan
  • Patent number: 11969255
    Abstract: In an example, a method includes receiving a cardiac signal that is sensed by an electrode at a tissue location inside the heart. Fractionations are identified in the cardiac signal. The fractionations identified at the tissue location are compared between first and second cardiac cycles of the cardiac signal. Based on the comparing, a likelihood is estimated, that the tissue location is causing a stable arrhythmia. Based on the estimated likelihood, the tissue location is indicated to a user as likely to be causing the stable arrhythmia.
    Type: Grant
    Filed: December 12, 2021
    Date of Patent: April 30, 2024
    Assignee: Biosense Webster (Israel) Ltd.
    Inventors: Eliyahu Ravuna, Nir Yanovich, Natalia Etin Zait, Leonid Zaides, Meytel Segev, Elad Nakar
  • Publication number: 20220413911
    Abstract: A computer system, processor, programming instructions and/or method for balancing the workload of processing pipelines that includes an execution slice, the execution slice comprising at least two processing pipelines having one or more execution units for processing instructions, wherein at least a first processing pipeline and a second processing pipeline are capable of executing a first instruction type; and an instruction decode unit for decoding instructions to determine which of the first processing pipeline or the second processing pipeline to execute the first instruction type. The processor configured to calculate at least one of a workload group consisting of: the first processing pipeline workload, the second processing pipeline workload, and combinations thereof; and select the first processing pipeline or the second processing pipeline to execute the first instruction type based upon at least one of the workload group.
    Type: Application
    Filed: June 29, 2021
    Publication date: December 29, 2022
    Inventors: Brian W. Thompto, Michael Joseph Genden, Tharunachalam Pindicura, Phillip G. Williams, Kent Li, Nir Segev, Mehul Patel