Patents by Inventor NIR TELL

NIR TELL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200110460
    Abstract: A parallel multi-step power management flow apparatus and method for using the same are disclosed. In one embodiment, an integrated circuit comprises a plurality of processing entities to execute operations, a power controller coupled to the plurality of processing entities to control power management for the plurality of processing entities, and a plurality of agents, where each of the plurality of agents is operable to perform a power control flow for one of the processing entities by separately scheduling, using a scheduler, and executing a plurality of power control flow phases in response to a plurality of requests received from the power controller, and each agent is operable to send a plurality of acknowledgements, one acknowledgement for each phase, upon completion of the plurality of power control flow phases.
    Type: Application
    Filed: July 16, 2019
    Publication date: April 9, 2020
    Inventors: Alexander Gendler, Doron Rajwan, Tal Kuzi, Dean Mulla, Ariel Szapiro, Nir Tell
  • Patent number: 10365707
    Abstract: A parallel multi-step power management flow apparatus and method for using the same are disclosed. In one embodiment, an integrated circuit comprises a plurality of processing entities to execute operations, a power controller coupled to the plurality of processing entities to control power management for the plurality of processing entities, and a plurality of agents, where each of the plurality of agents is operable to perform a power control flow for one of the processing entities by separately scheduling, using a scheduler, and executing a plurality of power control flow phases in response to a plurality of requests received from the power controller, and each agent is operable to send a plurality of acknowledgements, one acknowledgement for each phase, upon completion of the plurality of power control flow phases.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: July 30, 2019
    Assignee: INTEL CORPORATION
    Inventors: Alexander Gendler, Doron Rajwan, Tal Kuzi, Dean Mulla, Ariel Szapiro, Nir Tell
  • Publication number: 20180164873
    Abstract: A parallel multi-step power management flow apparatus and method for using the same are disclosed. In one embodiment, an integrated circuit comprises a plurality of processing entities to execute operations, a power controller coupled to the plurality of processing entities to control power management for the plurality of processing entities, and a plurality of agents, where each of the plurality of agents is operable to perform a power control flow for one of the processing entities by separately scheduling, using a scheduler, and executing a plurality of power control flow phases in response to a plurality of requests received from the power controller, and each agent is operable to send a plurality of acknowledgements, one acknowledgement for each phase, upon completion of the plurality of power control flow phases.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 14, 2018
    Inventors: Alexander Gendler, Doron Rajwan, Tal Kuzi, Dean Mulla, Ariel Szapiro, Nir Tell
  • Publication number: 20180164870
    Abstract: A parallel multi-step power management flow apparatus and method for using the same are disclosed. In one embodiment, an integrated circuit comprises a plurality of processing entities to execute operations, a power controller coupled to the plurality of processing entities to control power management for the plurality of processing entities, and a plurality of agents, where each of the plurality of agents is operable to perform a power control flow for one of the processing entities by separately scheduling, using a scheduler, and executing a plurality of power control flow phases in response to a plurality of requests received from the power controller, and each agent is operable to send a plurality of acknowledgements, one acknowledgement for each phase, upon completion of the plurality of power control flow phases.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: Alexander Gendler, Doron Rajwan, Tal Kuzi, Dean Mulla, Ariel Szapiro, Nir Tell
  • Publication number: 20160224090
    Abstract: In one embodiment, a processor comprises: a core to execute instructions; a fabric interface logic including a first storage to store state information of the core when the core is in a low power state; and an adapter unit including a second storage to store the state information of the core when the fabric interface logic is in a low power state. Other embodiments are described and claimed.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: ALEXANDER GENDLER, ARIEL SZAPIRO, NIR TELL