Abstract: Methods, systems, and devices for rate adjustments for a memory interface are described. A host system may communicate with a memory system via an interface according to multiple data transfer rates. For example, the host system may configure the interface to operate according to a first rate. The host system may switch the interface from the first rate to a second rate in response to one or more commands from the host system satisfying one or more parameters such as a threshold quantity of data associated with a command, a threshold quantity of issued commands associated with at least the threshold quantity of data, a threshold quantity of issued and unexecuted commands, or any combination thereof. Based on the switching, the host system may communicate with the memory system via the interface in accordance with the second rate.

Abstract: Methods, systems, and devices supporting techniques for pre-fetching information using pattern detection are described. Some memory systems may support pre-fetching information, such as logical-to-physical (L2P) mapping tables, data, or both, if a sequential pattern of read commands is detected. In some examples, the memory system may store a list of logical addresses indicated by received read commands and may determine whether the list corresponds to a sequential pattern independent of intervening write-alike commands. The list may store previous logical addresses for read commands, allowing the memory system to determine whether subsequent read commands form a sequential pattern. Additionally or alternatively, the memory system may track a ratio of hibernate commands to other commands (e.g., sequential read commands) and may refrain from pre-fetching L2P mapping tables for a detected sequence if the tracked ratio satisfies (e.g., exceeds) a threshold ratio.