Patents by Inventor Niraj Srimal
Niraj Srimal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11914587Abstract: A data storage device includes a non-volatile memory device including one or more memory dies and a controller. The controller is configured to receive a pseudocode file and a search key from one or more external devices and perform an index search based on the received pseudocode and search key. The controller may further determine a data file associated with the performed index search and output the determined data file to the one or more external device.Type: GrantFiled: October 13, 2021Date of Patent: February 27, 2024Assignee: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Adarsh Sreedhar, Ramanathan Muthiah
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Patent number: 11829619Abstract: Methods and apparatus are provided for arbitrating access to, and usage of, various device resources of a data storage device (DSD) configured for Machine Learning with Low-Power. The data storage device may include a TinyML controller with an artificial intelligence (AI) accelerator integrated with a data storage controller on a system-on-a-chip (SoC). The device resources may be, e.g., storage resources such as random access memory (RAM) devices, non-volatile memory (NVM) arrays, and latches formed on NVM dies of the NVM arrays. The resource arbitration may be based, for example, on parameters pertaining to ML operations performed by an ML controller that includes the AI accelerator, such as a turnaround time of an ML epoch or a stage-wise execution time. The resource arbitration is configured to provide for the efficient interleaving of the ML/AI operations performed by the ML controller and data storage operations performed by the data storage controller.Type: GrantFiled: November 9, 2021Date of Patent: November 28, 2023Assignee: Western Digital Technologies, Inc.Inventors: Adarsh Sreedhar, Niraj Srimal, Vimal Jain
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Publication number: 20230359550Abstract: Aspects of a storage device including a memory and a controller are provided. The controller may collect, by an association rule mining (ARM) model, file system data from a host file system, the file system data defining at least one attribute of a file. The controller may receive, from the host, a memory command associated with the file. The controller can associate, by the ARM model, the at least one attribute with the file. The controller may perform the memory command based on the association of the at least one attribute with the file.Type: ApplicationFiled: May 5, 2022Publication date: November 9, 2023Inventors: Ramanathan MUTHIAH, Adarsh SREEDHAR, Niraj SRIMAL
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Publication number: 20230342042Abstract: A method for securing a data storage device (DSD) against rogue behaviour by a host, the method executed by a controller of the DSD and comprising: determining a host type of the host; detecting one or more access activities performed by the host on the DSD; processing the one or more access activities to determine a security threat level of the host, wherein the security threat level is determined by weighting one or more corresponding access activity parameters by one or more impact weights; and in response to determining that the security threat level of the host is greater than or equal to a rogue host threat level, controlling the access activities performable by the host on the DSD to safeguard the DSD against the host, wherein the one or more impact weights are dynamically determined based on the host type.Type: ApplicationFiled: April 25, 2022Publication date: October 26, 2023Applicant: Western Digital Technologies, Inc.Inventors: Ramanathan MUTHIAH, Adarsh SREEDHAR, Niraj SRIMAL
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Patent number: 11775200Abstract: Storage devices store not only host data, but also control data related to operations of the storage device associated with the data. Control data is stored within blocks of memory called control blocks. As storage devices are configured to communicate with numerous hosts and namespaces, proper management of the available control blocks can avoid numerous problems such as mixed control block usage that punish certain hosts based on actions of other, non-related hosts. Methods and devices that efficiently manage control blocks include a control block management logic configured to process a request to generate a new namespace and parse the namespace request to determine the number of control blocks required. These separate control blocks for the requested namespace can be partitioned. Finally, control block activity for the requested namespace is directed only to the partitioned control blocks. Thus, the various control block activity between hosts is separate and not mixed.Type: GrantFiled: April 19, 2021Date of Patent: October 3, 2023Assignee: Western Digital Technologies, Inc.Inventors: Adarsh Sreedhar, Niraj Srimal, Ramanathan Muthiah
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Publication number: 20230147294Abstract: Methods and apparatus are provided for arbitrating access to, and usage of, various device resources of a data storage device (DSD) configured for Machine Learning with Low-Power. The data storage device may include a TinyML controller with an artificial intelligence (AI) accelerator integrated with a data storage controller on a system-on-a-chip (SoC). The device resources may be, e.g., storage resources such as random access memory (RAM) devices, non-volatile memory (NVM) arrays, and latches formed on NVM dies of the NVM arrays. The resource arbitration may be based, for example, on parameters pertaining to ML operations performed by an ML controller that includes the AI accelerator, such as a turnaround time of an ML epoch or a stage-wise execution time. The resource arbitration is configured to provide for the efficient interleaving of the ML/AI operations performed by the ML controller and data storage operations performed by the data storage controller.Type: ApplicationFiled: November 9, 2021Publication date: May 11, 2023Inventors: Adarsh Sreedhar, Niraj Srimal, Vimal Jain
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Publication number: 20230113460Abstract: A data storage device includes a non-volatile memory device including one or more memory dies and a controller. The controller is configured to receive a pseudocode file and a search key from one or more external devices and perform an index search based on the received pseudocode and search key. The controller may further determine a data file associated with the performed index search and output the determined data file to the one or more external device.Type: ApplicationFiled: October 13, 2021Publication date: April 13, 2023Inventors: Niraj Srimal, Adarsh Sreedhar, Ramanathan Muthiah
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Data storage device and method for preventing accidental updates and deletions using data versioning
Patent number: 11592995Abstract: A data storage device and method for preventing accidental updates and deletions using data versioning are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to: receive a command from a host to modify data stored in the memory, wherein the data is associated with a host identifier created by the data storage device; determine whether the host is associated with the host identifier; in response to determining that the host is associated with the host identifier, modify the data; and in response to determining that the host is not associated with the host identifier, create a new version of the data without modifying the data. Other embodiments are provided.Type: GrantFiled: April 19, 2021Date of Patent: February 28, 2023Assignee: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Ramanathan Muthiah -
Patent number: 11513691Abstract: Systems and methods are disclosed for providing parallel data transfer. In certain embodiments, a data storage device includes a non-volatile memory and a controller configured to: receive a command from a host to obtain a file stored in the non-volatile memory; determine a plurality of channels available between the host and the data storage device; dynamically divide the file into a plurality of chunks based at least in part on the plurality of channels; perform load balancing to determine a first chunk of the plurality of chunks to be sent over a first channel of the plurality of channels and at least a second chunk of the plurality of chunks to be sent over a second channel of the plurality of channels; and simultaneously transmit the first chunk over the first channel and the second chunk over the second channel.Type: GrantFiled: February 22, 2021Date of Patent: November 29, 2022Assignee: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Adarsh Sreedhar, Rakshit Tikoo, Aditya Gadgil
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Publication number: 20220334755Abstract: Storage devices store not only host data, but also control data related to operations of the storage device associated with the data. Control data is stored within blocks of memory called control blocks. As storage devices are configured to communicate with numerous hosts and namespaces, proper management of the available control blocks can avoid numerous problems such as mixed control block usage that punish certain hosts based on actions of other, non-related hosts. Methods and devices that efficiently manage control blocks include a control block management logic configured to process a request to generate a new namespace and parse the namespace request to determine the number of control blocks required. These separate control blocks for the requested namespace can be partitioned. Finally, control block activity for the requested namespace is directed only to the partitioned control blocks. Thus, the various control block activity between hosts is separate and not mixed.Type: ApplicationFiled: April 19, 2021Publication date: October 20, 2022Inventors: Adarsh Sreedhar, Niraj Srimal, Ramanathan Muthiah
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Data Storage Device and Method for Preventing Accidental Updates and Deletions Using Data Versioning
Publication number: 20220334730Abstract: A data storage device and method for preventing accidental updates and deletions using data versioning are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to: receive a command from a host to modify data stored in the memory, wherein the data is associated with a host identifier created by the data storage device; determine whether the host is associated with the host identifier; in response to determining that the host is associated with the host identifier, modify the data; and in response to determining that the host is not associated with the host identifier, create a new version of the data without modifying the data. Other embodiments are provided.Type: ApplicationFiled: April 19, 2021Publication date: October 20, 2022Applicant: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Ramanathan Muthiah -
Patent number: 11455244Abstract: Aspects of a storage device including a memory and a controller are provided which reduces or eliminates garbage collection in zoned namespace (ZNS) architectures by mapping zones to sub-blocks of blocks of the memory. Each zone includes a plurality of logical addresses. The controller determines a number of open zones, and maps the open zones to the sub-blocks in response to the number of open zones meeting a threshold. Thus, larger numbers of open blocks typically present in ZNS may be reduced, and increased block sizes due to scaling may be accommodated in ZNS. In some aspects, the controller receives a request from a host device to write data associated with the zones in sub-blocks, and maps each of the zones to at least one of the sub-blocks in response to the request. The request may indicate zones are partially unused. Thus, out of zone conditions may also be avoided.Type: GrantFiled: February 19, 2021Date of Patent: September 27, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Rakshit Tikoo, Adarsh Sreedhar, Lovleen Arora, Niraj Srimal
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Publication number: 20220221990Abstract: Systems and methods are disclosed for providing parallel data transfer. In certain embodiments, a data storage device includes a non-volatile memory and a controller configured to: receive a command from a host to obtain a file stored in the non-volatile memory; determine a plurality of channels available between the host and the data storage device; dynamically divide the file into a plurality of chunks based at least in part on the plurality of channels; perform load balancing to determine a first chunk of the plurality of chunks to be sent over a first channel of the plurality of channels and at least a second chunk of the plurality of chunks to be sent over a second channel of the plurality of channels; and simultaneously transmit the first chunk over the first channel and the second chunk over the second channel.Type: ApplicationFiled: February 22, 2021Publication date: July 14, 2022Inventors: Niraj Srimal, Adarsh Sreedhar, Rakshit Tikoo, Aditya Gadgil
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Patent number: 11301168Abstract: A storage system and method for user-defined data archiving are provided. In one embodiment, the method comprises: receiving a write command from a host; determining whether the storage system received an indicator from the host indicating that data of the write command is archive data; in response to determining that the storage system received the indicator, storing the data in the multi-level memory cells; and in response to determining that the storage system did not receive the indicator, storing the data in the single-level memory cells. Other embodiments are provided.Type: GrantFiled: December 13, 2019Date of Patent: April 12, 2022Assignee: Western Digital Technologies, Inc.Inventors: Laxmi Bhoopali, Ramanathan Muthiah, Kshitij Gupta, Niraj Srimal
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Publication number: 20220075716Abstract: Aspects of a storage device including a memory and a controller are provided which reduces or eliminates garbage collection in zoned namespace (ZNS) architectures by mapping zones to sub-blocks of blocks of the memory. Each zone includes a plurality of logical addresses. The controller determines a number of open zones, and maps the open zones to the sub-blocks in response to the number of open zones meeting a threshold. Thus, larger numbers of open blocks typically present in ZNS may be reduced, and increased block sizes due to scaling may be accommodated in ZNS. In some aspects, the controller receives a request from a host device to write data associated with the zones in sub-blocks, and maps each of the zones to at least one of the sub-blocks in response to the request. The request may indicate zones are partially unused. Thus, out of zone conditions may also be avoided.Type: ApplicationFiled: February 19, 2021Publication date: March 10, 2022Inventors: Rakshit Tikoo, Adarsh Sreedhar, Lovleen Arora, Niraj Srimal
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Publication number: 20210181975Abstract: A storage system and method for user-defined data archiving are provided. In one embodiment, the method comprises: receiving a write command from a host; determining whether the storage system received an indicator from the host indicating that data of the write command is archive data; in response to determining that the storage system received the indicator, storing the data in the multi-level memory cells; and in response to determining that the storage system did not receive the indicator, storing the data in the single-level memory cells. Other embodiments are provided.Type: ApplicationFiled: December 13, 2019Publication date: June 17, 2021Applicant: Western Digital Technologies, Inc.Inventors: Laxmi Bhoopali, Ramanathan Muthiah, Kshitij Gupta, Niraj Srimal
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Patent number: 11003373Abstract: A method for managing physical-to-logical address information in a memory system includes determining whether a memory fragment of a memory block is a last memory fragment of the memory block. The method also includes, in response to a determination that the memory fragment is not the last memory fragment of the memory block: performing a write operation on the memory fragment; storing, in cache associated with the memory system, physical-to-logical address information associated with the memory fragment; and, in response to a determination that the cache is full, writing, to a next memory fragment of the memory block, control metadata associated with physical-to-logical address information stored in the cache.Type: GrantFiled: June 28, 2019Date of Patent: May 11, 2021Assignee: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Ramanathan Muthiah
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Publication number: 20200409554Abstract: A method for managing physical-to-logical address information in a memory system includes determining whether a memory fragment of a memory block is a last memory fragment of the memory block. The method also includes, in response to a determination that the memory fragment is not the last memory fragment of the memory block: performing a write operation on the memory fragment; storing, in cache associated with the memory system, physical-to-logical address information associated with the memory fragment; and, in response to a determination that the cache is full, writing, to a next memory fragment of the memory block, control metadata associated with physical-to-logical address information stored in the cache.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Applicant: Western Digital Technologies, Inc.Inventors: Niraj Srimal, Ramanathan Muthiah