Patents by Inventor Niranjan Hasabnis
Niranjan Hasabnis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11977605Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that implement an automatically evolving code recommendation engine. In one example, the apparatus collects a user code snippet. The apparatus then determines a structured representation of the user code snippet. Next, the apparatus generates a recommended code snippet using the structured representation of the user code snippet. Then the apparatus obtains user-determined code snippet feedback comparing the user code snippet to the recommended code snippet, the user-determined code snippet feedback indicating one of a match, no match, or uncertain. Finally, the apparatus stores a code snippet training pair in a training database, the code snippet training pair including the user code snippet and the recommended code snippet.Type: GrantFiled: December 14, 2021Date of Patent: May 7, 2024Assignee: Intel CorporationInventors: Justin Gottschlich, Niranjan Hasabnis, Paul Petersen, Shengtian Zhou, Celine Lee
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Publication number: 20240143296Abstract: Example apparatus disclosed includes interface circuitry, machine readable instructions, and programmable circuitry to at least one of instantiate or execute the machine readable instructions to receive an input source code by a code large language model (LLM), generate one or more code representations of the input source code, analyze the one or more code representations of the input source code, and compile the one or more code representations of the input source code into one or more computer executable instructions.Type: ApplicationFiled: December 21, 2023Publication date: May 2, 2024Inventor: Niranjan Hasabnis
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Publication number: 20240134705Abstract: Adjusting workload execution based on workload similarity. A processor may determine a similarity of a first workload to a second workload. The processor may adjust execution of the first workload based on execution parameters of the second workload and the similarity of the first workload to the second workload.Type: ApplicationFiled: December 13, 2023Publication date: April 25, 2024Applicant: Intel CorporationInventors: Niranjan Hasabnis, Patricia Mwove, Ellick Chan, Derssie Mebratu, Kshitij Doshi, Mohammad Hossain, Gaurav Chaudhary
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Patent number: 11954466Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that perform machine learning-guided compiler optimizations for register-based hardware architectures. Examples disclosed herein include a non-transitory computer readable medium comprising instructions that, when executed, cause a machine to at least select a register-based compiler transformation to apply to source code at a current position in a search tree, determine whether the search tree is in need of pruning based on an output of a query to a machine learning (ML) model, in response to determining the search tree is in need of pruning, prune the search tree at the current position, in response to applying the selected register-based compiler transformation to the source code, generate a code variant, calculate a score associated with the source code at the current position in the search tree, and update parameters of the machine learning (ML) model to include the calculated score.Type: GrantFiled: December 23, 2021Date of Patent: April 9, 2024Assignee: Intel CorporationInventors: Anand Venkat, Justin Gottschlich, Niranjan Hasabnis
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Patent number: 11704226Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect code defects. An example apparatus includes repository interface circuitry to retrieve code repositories corresponding to a programming language of interest, tree generating circuitry to generate parse trees corresponding to code blocks contained in the code repositories, directed acyclic graph (DAG) circuitry to generate DAGs corresponding to respective ones of the parse trees, the DAGs including control flow information and data flow information, abstraction generating circuitry to abstract the DAGs, invariant identification circuitry to extract invariants from the abstracted DAGs, and DAG comparison circuitry to cluster respective ones of the extracted invariants to identify respective ones of the abstracted DAGs with common invariants.Type: GrantFiled: September 23, 2021Date of Patent: July 18, 2023Assignee: Intel CorporationInventors: Niranjan Hasabnis, Justin Gottschlich, Jeremie Dreyfuss, Amitai Armon, Itamar Ben-Ari, Oren David Kimhi
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Publication number: 20220334835Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that implement an automatically evolving code recommendation engine. In one example, the apparatus collects a user code snippet. The apparatus then determines a structured representation of the user code snippet. Next, the apparatus generates a recommended code snippet using the structured representation of the user code snippet. Then the apparatus obtains user-determined code snippet feedback comparing the user code snippet to the recommended code snippet, the user-determined code snippet feedback indicating one of a match, no match, or uncertain. Finally, the apparatus stores a code snippet training pair in a training database, the code snippet training pair including the user code snippet and the recommended code snippet.Type: ApplicationFiled: December 14, 2021Publication date: October 20, 2022Inventors: Justin Gottschlich, Niranjan Hasabnis, Paul Petersen, Shengtian Zhou, Celine Lee
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Publication number: 20220121430Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that perform machine learning-guided compiler optimizations for register-based hardware architectures. Examples disclosed herein include a non-transitory computer readable medium comprising instructions that, when executed, cause a machine to at least select a register-based compiler transformation to apply to source code at a current position in a search tree, determine whether the search tree is in need of pruning based on an output of a query to a machine learning (ML) model, in response to determining the search tree is in need of pruning, prune the search tree at the current position, in response to applying the selected register-based compiler transformation to the source code, generate a code variant, calculate a score associated with the source code at the current position in the search tree, and update parameters of the machine learning (ML) model to include the calculated score.Type: ApplicationFiled: December 23, 2021Publication date: April 21, 2022Inventors: Anand Venkat, Justin Gottschlich, Niranjan Hasabnis
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Publication number: 20220114137Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to generate command lists to be offloaded to accelerator circuitry. An example apparatus includes kernel duration model circuitry to predict a duration of execution of a first kernel based on a first source location, a first name, a first property of a first argument, or an occupancy of the first kernel. The example apparatus includes subsequent kernel model circuitry to predict a tuple and a dependency of a second kernel based on a second source location, a second name, a second property of a second argument, or a time of submission of the previous kernel. The example apparatus includes reinforcement learning model circuitry to determine whether to bundle the first kernel into a command list based on the duration of execution of the first kernel, the tuple of the second kernel, or the dependency of the second kernel.Type: ApplicationFiled: December 22, 2021Publication date: April 14, 2022Inventors: Celine Lee, Niranjan Hasabnis, Paul Petersen, Justin Gottschlich, Ramesh Peri
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Publication number: 20220107793Abstract: Various examples relate to an apparatus, device, method, and computer program for determining a placement of an execution of a computer program, and to an apparatus, device, method, and computer program for training at least one machine-learning model. The apparatus for determining the placement of an execution of a computer program comprises processing circuitry that is configured to generate a graph representation of a computer program, generate, using a first machine-learning model, a vector embedding of the graph representation of the computer program, and to determine, based on an output of a second machine-learning model, a placement of an execution of the computer program on one or more hardware devices of a heterogenous plurality of hardware devices of a computer system, with the vector embedding and information on the load of the hardware devices being provided as input to the second machine-learning model.Type: ApplicationFiled: December 14, 2021Publication date: April 7, 2022Inventors: Mihai CAPOTA, Guixiang MA, Shengtian ZHOU, Niranjan HASABNIS, Nesreen AHMED
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Publication number: 20220091895Abstract: Methods, apparatus, systems, and articles of manufacture to determine execution cost are disclosed. An example apparatus includes memory; instructions included in the apparatus; and processor circuitry to execute the instruction to: cause a plurality of instructions corresponding to a mnemonic to be executed; determine an average execution cost of the plurality of instructions; determine a standard deviation of execution costs of the plurality of instructions; and generate a mapping table including an entry, the entry including the mnemonic in association with the average and the standard deviation.Type: ApplicationFiled: December 2, 2021Publication date: March 24, 2022Inventors: Niranjan Hasabnis, Justin Gottschlich, Jesmin Jahan Tithi, Anand Venkat
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Publication number: 20220092042Abstract: Methods, apparatus, systems, and articles of manufacture to improve data quality for artificial intelligence are disclosed. An example apparatus includes an interface; instructions; and processor circuitry to execute the instruction to: determine an indirect quality of a repository that include datapoints of a dataset; determine a direct quality of the repository that include the datapoints of the dataset; determine a dataset quality based on the indirect quality of the repository and the direct quality of the repository; and when the quality does not satisfy a threshold, filter out a subset of the datapoints to prepare the dataset to support the training of the neural network.Type: ApplicationFiled: December 1, 2021Publication date: March 24, 2022Inventors: Niranjan Hasabnis, Justin Gottschlich, Celine Lee, Emine Tatbul Bitim, Shengtian Zhou
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Publication number: 20220012163Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to detect code defects. An example apparatus includes repository interface circuitry to retrieve code repositories corresponding to a programming language of interest, tree generating circuitry to generate parse trees corresponding to code blocks contained in the code repositories, directed acyclic graph (DAG) circuitry to generate DAGs corresponding to respective ones of the parse trees, the DAGs including control flow information and data flow information, abstraction generating circuitry to abstract the DAGs, invariant identification circuitry to extract invariants from the abstracted DAGs, and DAG comparison circuitry to cluster respective ones of the extracted invariants to identify respective ones of the abstracted DAGs with common invariants.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Niranjan Hasabnis, Justin Gottschlich, Jeremie Dreyfuss, Amitai Armon, Itamar Ben-Ari, Oren David Kimhi
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Publication number: 20210073632Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for generating code semantics. An example apparatus includes a concept controller to assign semantic labels to repository data to generate a training set, the semantic labels stored in a first semantic graph, the training set including a first code block associated with a first semantic label and a second code block associated with a second semantic label, a concept determiner to generate a first block embedding based on the first code block and a second block embedding based on the second code block, a graph generator to link the first block embedding to the second block embedding to form a second semantic graph, and a graph parser to output at least one of the first code block or the second code block corresponding to a query based on the second semantic graph.Type: ApplicationFiled: November 18, 2020Publication date: March 11, 2021Inventors: Roshni G. Iyer, Justin Gottschlich, Joseph Tarango, Jim Baca, Niranjan Hasabnis
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Patent number: 10120663Abstract: An inter-architecture compatibility apparatus of an aspect includes a control flow transfer reception module to receive a first call procedure operation, intended for a first architecture library module, from a first architecture code module. The first call procedure operation involves a first plurality of input parameters. An application binary interface (ABI) change module is coupled with the control flow transfer reception module. The ABI change module makes ABI changes to convert the first call procedure operation involving the first plurality of input parameters to a corresponding second call procedure operation involving a second plurality of input parameters. The second call procedure operation is compatible with a second architecture library module. A control flow transfer output module is coupled with the ABI change module. The control flow transfer output module provides the second call procedure operation to the second architecture library module.Type: GrantFiled: March 28, 2014Date of Patent: November 6, 2018Assignee: Intel CorporationInventors: Niranjan Hasabnis, Suresh Srinivas, Jayaram Bobba
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Publication number: 20150277867Abstract: An inter-architecture compatibility apparatus of an aspect includes a control flow transfer reception module to receive a first call procedure operation, intended for a first architecture library module, from a first architecture code module. The first call procedure operation involves a first plurality of input parameters. An application binary interface (ABI) change module is coupled with the control flow transfer reception module. The ABI change module makes ABI changes to convert the first call procedure operation involving the first plurality of input parameters to a corresponding second call procedure operation involving a second plurality of input parameters. The second call procedure operation is compatible with a second architecture library module. A control flow transfer output module is coupled with the ABI change module. The control flow transfer output module provides the second call procedure operation to the second architecture library module.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Inventors: Niranjan Hasabnis, Suresh Srinivas, Jayaram Bobba