Patents by Inventor Nirav Prashantkumar Trivedi

Nirav Prashantkumar Trivedi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11520721
    Abstract: A digital interface circuit includes a queue block configured to be coupled between an analog-to-digital converter (ADC) and a Direct Memory Access (DMA) controller of a processor, where the queue block comprises a command buffer and is configured to: receive a first command from the DMA controller; store the first command in the command buffer; modify the first command in accordance with first control bits of the first command to generate a modified first command; and send the modified first command to the ADC.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: December 6, 2022
    Assignees: STMICROELECTRONICS INTERNATIONAL N.V., STMICROELECTRONICS APPLICATION GMBH
    Inventors: Nirav Prashantkumar Trivedi, Sandip Atal, Rolf Nandlinger
  • Patent number: 11397809
    Abstract: An embedded system includes a peripheral and system-on-a-chip executing virtual machines and a hypervisor. The peripheral includes a crossbar circuit receiving digital sensor signals and selectively outputting the digital sensor signals to different outputs, queue circuits each receiving a different one of the digital sensor signals from the crossbar circuit, and queue protection circuits associated with the queue circuits and selectively permitting access to one of the queue circuits by the virtual machines. The hypervisor controls the queue protection circuits to set which of the virtual machines may access which queue circuits. A sensor protection circuit selectively permits reading of the digital sensor signals from the crossbar circuit by the queue circuits. The hypervisor controls the sensor protection circuit to set which of the queue circuits may access each of the digital sensor signals from the crossbar circuit.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: July 26, 2022
    Assignee: STMicroelectronics International N.V.
    Inventors: Deepak Baranwal, Nirav Prashantkumar Trivedi, Sandip Atal
  • Publication number: 20210089651
    Abstract: An embedded system includes a peripheral and system-on-a-chip executing virtual machines and a hypervisor. The peripheral includes a crossbar circuit receiving digital sensor signals and selectively outputting the digital sensor signals to different outputs, queue circuits each receiving a different one of the digital sensor signals from the crossbar circuit, and queue protection circuits associated with the queue circuits and selectively permitting access to one of the queue circuits by the virtual machines. The hypervisor controls the queue protection circuits to set which of the virtual machines may access which queue circuits. A sensor protection circuit selectively permits reading of the digital sensor signals from the crossbar circuit by the queue circuits. The hypervisor controls the sensor protection circuit to set which of the queue circuits may access each of the digital sensor signals from the crossbar circuit.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Applicant: STMicroelectronics International N.V.
    Inventors: Deepak BARANWAL, Nirav Prashantkumar TRIVEDI, Sandip ATAL
  • Publication number: 20210004339
    Abstract: A digital interface circuit includes a queue block configured to be coupled between an analog-to-digital converter (ADC) and a Direct Memory Access (DMA) controller of a processor, where the queue block comprises a command buffer and is configured to: receive a first command from the DMA controller; store the first command in the command buffer; modify the first command in accordance with first control bits of the first command to generate a modified first command; and send the modified first command to the ADC.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 7, 2021
    Inventors: Nirav Prashantkumar Trivedi, Sandip Atal, Rolf Nandlinger
  • Patent number: 10740267
    Abstract: A digital interface circuit includes a queue block configured to be coupled between an analog-to-digital converter (ADC) and a Direct Memory Access (DMA) controller of a processor, where the queue block comprises a command buffer and is configured to: receive a first command from the DMA controller; store the first command in the command buffer; modify the first command in accordance with first control bits of the first command to generate a modified first command; and send the modified first command to the ADC.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: August 11, 2020
    Assignees: STMICROELECTRONICS INTERNATIONAL N.V., STMICROELECTRONICS APPLICATION GMBH
    Inventors: Nirav Prashantkumar Trivedi, Sandip Atal, Rolf Nandlinger