Patents by Inventor Nirou Okazaki

Nirou Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6238943
    Abstract: An optical semiconductor device of the present invention is provided with a core layer having a quantum well layer in that film thickness gets thinner from a inner region to an end portion in an optical waveguide region.
    Type: Grant
    Filed: September 22, 1999
    Date of Patent: May 29, 2001
    Assignee: Fujitsu Limited
    Inventors: Hirohiko Kobayashi, Mitsuru Ekawa, Nirou Okazaki, Shouichi Ogita, Haruhisa Soda, Haruhiko Tabuchi, Takuya Fujii
  • Patent number: 5987046
    Abstract: An optical semiconductor device of the present invention is provided with a core layer having a quantum well layer in that film thickness gets thinner from a inner region to an end portion in an optical waveguide region.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 16, 1999
    Assignee: Fujitsu Limited
    Inventors: Hirohiko Kobayashi, Mitsuru Ekawa, Nirou Okazaki, Shouichi Ogita, Haruhisa Soda, Haruhiko Tabuchi, Takuya Fujii
  • Patent number: 5362674
    Abstract: A method of producing a mesa embedded optical semiconductor device includes the following steps. A multilayer semiconductor structure is formed which includes a laser active layer and an adjoining layer, on a substrate. The multilayer semiconductor structure is selectively etched to form a mesa structure and expose a first planar surface around a root of the mesa structure. The mesa structure is formed to have a second planar surface which is orthogonal to a side wall of the mesa structure and is lower than a top surface of the mesa structure, and a planar side wall formed by a side wall of the laser active layer and a side wall of the adjoining layer. An embedded layer is formed, by vapor growth deposition, at the first planar surface, the second planar surface, and the planar side wall of the mesa structure, such that the embedded layer is free of voids.
    Type: Grant
    Filed: August 2, 1991
    Date of Patent: November 8, 1994
    Assignee: Fujitsu Limited
    Inventor: Nirou Okazaki